| commit | 121d760d0788f95619049c63449d977065cab69d | [log] [tgz] |
|---|---|---|
| author | Zhi Wang <zhi.a.wang@intel.com> | Fri Dec 29 02:50:08 2017 +0800 |
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | Thu Jan 04 14:23:28 2018 +0800 |
| tree | 386ce4f5f14d94013416994fe660ef26d20abdb3 | |
| parent | f5f00e7dcc4161f07b76ff1a854e8b1ea7a1ed41 [diff] |
drm/i915/gvt: Clear the shadow page table entry after post-sync
A shadow page table entry needs to be cleared after being set as
post-sync. This patch fixes the recent error reported in Win7-32 test.
Fixes: 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization")
Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
CC: Stable <stable@vger.kernel.org>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>