| commit | 0d2b96af53c973942c8c5a2c6629915774bae187 | [log] [tgz] |
|---|---|---|
| author | Maxime Ripard <maxime@cerno.tech> | Thu Sep 03 10:01:02 2020 +0200 |
| committer | Maxime Ripard <maxime@cerno.tech> | Mon Sep 07 18:04:12 2020 +0200 |
| tree | 1fd69a475938bae8e7286f217318b2044f0ae34f | |
| parent | b7cb67a6b4fbb99a297bb0a57d906f56d81b29c9 [diff] |
drm/vc4: crtc: Clear the PixelValve FIFO on disable In order to avoid a stale pixel getting stuck on mode change or a disable / enable cycle, we need to make sure to flush the PV FIFO on disable. Signed-off-by: Maxime Ripard <maxime@cerno.tech> Tested-by: Chanwoo Choi <cw00.choi@samsung.com> Tested-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Link: https://patchwork.freedesktop.org/patch/msgid/26fe48b09d77088679ed0c8cb8cf0db2f108195e.1599120059.git-series.maxime@cerno.tech