| commit | 0bbe62eb92755ff7c16c859e96a3877de56e32c9 | [log] [tgz] |
|---|---|---|
| author | zhangqing <zhangqing@rock-chips.com> | Mon Jan 25 08:56:01 2016 -0800 |
| committer | Heiko Stuebner <heiko@sntech.de> | Mon Jan 25 11:04:51 2016 +0100 |
| tree | 717c52dc1c27b2f8541c3749b44e9a288932d272 | |
| parent | d566ebc3c06c17b108b5b844f9d08259e3b7ba84 [diff] |
clk: rockchip: rk3368: enable the CLK_SET_RATE_PARENT flag for spdif_8ch SPDIF_8CH set freq need to select parent and calculate parent freq. so just mark it as the CLK_SET_RATE_PARENT flag. Signed-off-by: zhangqing <zhangqing@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>