| commit | 0b126112e90a96907aa14c39374fc7bfdbba131a | [log] [tgz] |
|---|---|---|
| author | Eric Bernstein <eric.bernstein@amd.com> | Mon May 14 17:01:00 2018 -0400 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Fri Jun 15 12:20:27 2018 -0500 |
| tree | 3a6a2e3704fb79d088650cfbef67341058bd4140 | |
| parent | 8de94233f4cdcd5b3065fa9b9af3edc10874a120 [diff] |
drm/amd/display: DP YCbCr 4:2:0 support Update MSA MISC1 bit 6 programming to handle YCbCr 4:2:0 and BT2020 cases. Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>