commit | 07fec1c2e75ef2f55d7a211414b0d63e185e84f0 | [log] [tgz] |
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author | Alexander Graf <agraf@suse.de> | Thu Apr 17 12:53:13 2014 +0200 |
committer | Alexander Graf <agraf@suse.de> | Fri May 30 14:26:17 2014 +0200 |
tree | f71b012a7ffd10655f37d78a8c9ea39a9b31a07d | |
parent | 1f854112553a1d65363ab27d4ee3dfb4b27075fb [diff] |
KVM: PPC: E500: Ignore L1CSR1_ICFI,ICLFR The L1 instruction cache control register contains bits that indicate that we're still handling a request. Mask those out when we set the SPR so that a read doesn't assume we're still doing something. Signed-off-by: Alexander Graf <agraf@suse.de>