| commit | 07d6a199219562834757ac72c28f3836b4e85694 | [log] [tgz] |
|---|---|---|
| author | Anthony Koo <Anthony.Koo@amd.com> | Fri Feb 15 14:19:30 2019 -0500 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Tue Mar 19 15:04:03 2019 -0500 |
| tree | caba52fc93644be81e6293f2a689e17dfba01f9f | |
| parent | 09e5665adafa4b00e04acbaa96c73532942f09b3 [diff] |
drm/amd/display: Fix soft hang issue when some DPCD data invalid [Why] AUX transaction returns success, but data has invalid lane count and rate which when passed to VBIOS command table causes it to soft hang [How] Do some sanity checking and fail if the DPCD caps are invalid. Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>