commit | 0467811e9bdb22c7a1595db4c230efd99265e3c7 | [log] [tgz] |
---|---|---|
author | Paul Burton <paul.burton@imgtec.com> | Fri Feb 14 09:21:30 2014 +0000 |
committer | Paul Burton <paul.burton@imgtec.com> | Fri May 02 16:39:10 2014 +0100 |
tree | d9546ca9126c6bf78895843bbaf787a576d3c3e8 | |
parent | 74e91335190c628b870c69cff8360d23707b1f53 [diff] |
MIPS: mark GIC clockevent device with CLOCK_EVT_FEAT_C3STOP Although the GIC counter will continue when a core is in a low power state and it will still trigger interrupts, the core will be incapable of servicing those interrupts rendering them useless. Signed-off-by: Paul Burton <paul.burton@imgtec.com>