| commit | 03d6e3aac81634a91dd2790f8c199ffb3927fe3c | [log] [tgz] |
|---|---|---|
| author | James Zhu <James.Zhu@amd.com> | Mon Sep 10 16:00:36 2018 -0400 |
| committer | Alex Deucher <alexander.deucher@amd.com> | Wed Sep 26 21:09:24 2018 -0500 |
| tree | 1c6e343575897cebfc58612cff171b91092c12de | |
| parent | f28ff06210f444da0b52168450625ad883ff8a1f [diff] |
drm/amdgpu:Add DPG mode read/write macro Some registers read/write needs program through SDRAM pool under DPG mode. Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>