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review.shift-gmbh.com / SHIFTPHONES / android_kernel_shift_sdm845 / 46896c73c1a4dde527c3a3cc43379deeb41985a1 / drivers / clk / mediatek / clk-pll.c
  1. cdb2bab clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS by James Liao · 10 years ago
  2. 75ce0cd clk: mediatek: Add MT8173 MMPLL change rate support by James Liao · 10 years ago
  3. 196de71 clk: mediatek: Fix calculation of PLL rate settings by James Liao · 10 years ago
  4. b3be457 clk: mediatek: Fix PLL registers setting flow by James Liao · 10 years ago
  5. 95f5898 clk: mediatek: Initialize clk_init_data by Ricky Liang · 10 years ago
  6. 9741b1a clk: mediatek: Add initial common clock support for Mediatek SoCs. by James Liao · 10 years ago