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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Generic Generic NCR5380 driver defines
3 *
4 * Copyright 1993, Drew Eckhardt
5 * Visionary Computing
6 * (Unix and Linux consulting and custom programming)
7 * drew@colorado.edu
8 * +1 (303) 440-4894
9 *
10 * NCR53C400 extensions (c) 1994,1995,1996, Kevin Lentin
11 * K.Lentin@cs.monash.edu.au
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
13
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#ifndef GENERIC_NCR5380_H
15#define GENERIC_NCR5380_H
16
Finn Thain4d8c08c2016-01-03 16:05:09 +110017#ifdef CONFIG_SCSI_GENERIC_NCR53C400
Linus Torvalds1da177e2005-04-16 15:20:36 -070018#define BIOSPARAM
19#define NCR5380_BIOSPARAM generic_NCR5380_biosparam
20#else
21#define NCR5380_BIOSPARAM NULL
22#endif
23
Linus Torvalds1da177e2005-04-16 15:20:36 -070024#define __STRVAL(x) #x
25#define STRVAL(x) __STRVAL(x)
26
Ondrej Zary702a98c2010-08-10 18:01:16 -070027#ifndef SCSI_G_NCR5380_MEM
Finn Thainaa2e2cb2016-01-03 16:05:48 +110028#define DRV_MODULE_NAME "g_NCR5380"
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#define NCR5380_map_type int
31#define NCR5380_map_name port
Linus Torvalds1da177e2005-04-16 15:20:36 -070032#define NCR53C400_register_offset 0
Linus Torvalds1da177e2005-04-16 15:20:36 -070033
Finn Thain4d8c08c2016-01-03 16:05:09 +110034#ifdef CONFIG_SCSI_GENERIC_NCR53C400
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#define NCR5380_region_size 16
36#else
37#define NCR5380_region_size 8
38#endif
39
Finn Thain54d8fe42016-01-03 16:05:06 +110040#define NCR5380_read(reg) \
41 inb(instance->io_port + (reg))
42#define NCR5380_write(reg, value) \
43 outb(value, instance->io_port + (reg))
Linus Torvalds1da177e2005-04-16 15:20:36 -070044
Finn Thain54d8fe42016-01-03 16:05:06 +110045#define NCR5380_implementation_fields /* none */
Al Viroc818cb62006-03-24 03:15:37 -080046
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#else
Ondrej Zary702a98c2010-08-10 18:01:16 -070048/* therefore SCSI_G_NCR5380_MEM */
Finn Thainaa2e2cb2016-01-03 16:05:48 +110049#define DRV_MODULE_NAME "g_NCR5380_mmio"
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#define NCR5380_map_type unsigned long
52#define NCR5380_map_name base
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#define NCR53C400_register_offset 0x108
Linus Torvalds1da177e2005-04-16 15:20:36 -070054#define NCR53C400_mem_base 0x3880
55#define NCR53C400_host_buffer 0x3900
56#define NCR5380_region_size 0x3a00
57
Finn Thain54d8fe42016-01-03 16:05:06 +110058#define NCR5380_read(reg) \
59 readb(((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
60 NCR53C400_mem_base + (reg))
61#define NCR5380_write(reg, value) \
62 writeb(value, ((struct NCR5380_hostdata *)shost_priv(instance))->iomem + \
63 NCR53C400_mem_base + (reg))
Linus Torvalds1da177e2005-04-16 15:20:36 -070064
65#define NCR5380_implementation_fields \
Al Viroc818cb62006-03-24 03:15:37 -080066 void __iomem *iomem;
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
Al Viroc818cb62006-03-24 03:15:37 -080068#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070069
Finn Thainff3d4572016-01-03 16:05:25 +110070#define NCR5380_dma_xfer_len(instance, cmd, phase) \
71 generic_NCR5380_dma_xfer_len(cmd)
72
Linus Torvalds1da177e2005-04-16 15:20:36 -070073#define NCR5380_intr generic_NCR5380_intr
74#define NCR5380_queue_command generic_NCR5380_queue_command
75#define NCR5380_abort generic_NCR5380_abort
76#define NCR5380_bus_reset generic_NCR5380_bus_reset
Linus Torvalds1da177e2005-04-16 15:20:36 -070077#define NCR5380_pread generic_NCR5380_pread
78#define NCR5380_pwrite generic_NCR5380_pwrite
Finn Thain8c325132014-11-12 16:11:58 +110079#define NCR5380_info generic_NCR5380_info
80#define NCR5380_show_info generic_NCR5380_show_info
Linus Torvalds1da177e2005-04-16 15:20:36 -070081
82#define BOARD_NCR5380 0
83#define BOARD_NCR53C400 1
84#define BOARD_NCR53C400A 2
85#define BOARD_DTC3181E 3
86
Linus Torvalds1da177e2005-04-16 15:20:36 -070087#endif /* GENERIC_NCR5380_H */
88