tree 39d746a48f81b828705380a27c32165a658f3712
parent dc3d226f3366f98af73caffc46b5c0a57fe32a51
author Jacob Keller <jacob.e.keller@intel.com> 1362210702 +0000
committer Jeff Kirsher <jeffrey.t.kirsher@intel.com> 1366941547 -0700

ixgbe: fix EICR write in ixgbe_msix_other

Previously, the ixgbe_msix_other was writing the full 32bits of the set
interrupts, instead of only the ones which the ixgbe_msix_other is
handling. This resulted in a loss of performance when the X540's PPS feature is
enabled due to sometimes clearing queue interrupts which resulted in the driver
not getting the interrupt for cleaning the q_vector rings often enough. The fix
is to simply mask the lower 16bits off so that this handler does not write them
in the EICR, which causes them to remain high and be properly handled by the
clean_rings interrupt routine as normal.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Cc: stable <stable@vger.kernel.org>
Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>