tree ab831c0c58216294eeaa7867c60fd632ff5cb809
parent c751e17b5371ad86cdde6cf5c0175e06f3ff0347
author Dirk Brandewie <dirk.j.brandewie@intel.com> 1289333285 -0800
committer Thomas Gleixner <tglx@linutronix.de> 1289519141 +0100

ce4100: Add PCI register emulation for CE4100

This patch provides access methods for PCI registers that mis-behave on
the CE4100. Each register can be assigned a private init, read and
write routine. The exception to this is the bridge device. The
bridge device is the only device on bus zero (0) that requires any
fixup so it is a special case.

[ tglx: minor coding style cleanups, __init annotation and
  	simplification of ce4100_conf_read/write ]

Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
LKML-Reference: <40b6751381c2275dc359db5a17989cce22ad8db7.1289331834.git.dirk.brandewie@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>