firewire: add read_csr_reg driver callback
To prepare for the following additions of more OHCI-implemented CSR
registers, replace the get_cycle_time driver callback with a generic
CSR register callback.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
diff --git a/drivers/firewire/core-cdev.c b/drivers/firewire/core-cdev.c
index 50332b8..2e62516 100644
--- a/drivers/firewire/core-cdev.c
+++ b/drivers/firewire/core-cdev.c
@@ -1044,7 +1044,7 @@
local_irq_disable();
- cycle_time = card->driver->get_cycle_time(card);
+ cycle_time = card->driver->read_csr_reg(card, CSR_CYCLE_TIME);
switch (a->clk_id) {
case CLOCK_REALTIME: getnstimeofday(&ts); break;
diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c
index 6971400..a4d8109 100644
--- a/drivers/firewire/core-transaction.c
+++ b/drivers/firewire/core-transaction.c
@@ -1025,7 +1025,8 @@
case CSR_CYCLE_TIME:
if (TCODE_IS_READ_REQUEST(tcode) && length == 4)
- *data = cpu_to_be32(card->driver->get_cycle_time(card));
+ *data = cpu_to_be32(card->driver->
+ read_csr_reg(card, CSR_CYCLE_TIME));
else
rcode = RCODE_TYPE_ERROR;
break;
diff --git a/drivers/firewire/core.h b/drivers/firewire/core.h
index 25a72e5..c19e987 100644
--- a/drivers/firewire/core.h
+++ b/drivers/firewire/core.h
@@ -75,7 +75,7 @@
int (*enable_phys_dma)(struct fw_card *card,
int node_id, int generation);
- u32 (*get_cycle_time)(struct fw_card *card);
+ u32 (*read_csr_reg)(struct fw_card *card, int csr_offset);
struct fw_iso_context *
(*allocate_iso_context)(struct fw_card *card,
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 65b9bdb..a8093a9 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -1939,9 +1939,8 @@
* error. (A PCI read should take at least 20 ticks of the 24.576 MHz timer to
* execute, so we have enough precision to compute the ratio of the differences.)
*/
-static u32 ohci_get_cycle_time(struct fw_card *card)
+static u32 get_cycle_time(struct fw_ohci *ohci)
{
- struct fw_ohci *ohci = fw_ohci(card);
u32 c0, c1, c2;
u32 t0, t1, t2;
s32 diff01, diff12;
@@ -1970,6 +1969,20 @@
return c2;
}
+static u32 ohci_read_csr_reg(struct fw_card *card, int csr_offset)
+{
+ struct fw_ohci *ohci = fw_ohci(card);
+
+ switch (csr_offset) {
+ case CSR_CYCLE_TIME:
+ return get_cycle_time(ohci);
+
+ default:
+ WARN_ON(1);
+ return 0;
+ }
+}
+
static void copy_iso_headers(struct iso_context *ctx, void *p)
{
int i = ctx->header_length;
@@ -2407,7 +2420,7 @@
.send_response = ohci_send_response,
.cancel_packet = ohci_cancel_packet,
.enable_phys_dma = ohci_enable_phys_dma,
- .get_cycle_time = ohci_get_cycle_time,
+ .read_csr_reg = ohci_read_csr_reg,
.allocate_iso_context = ohci_allocate_iso_context,
.free_iso_context = ohci_free_iso_context,