tree eddaa429e909f209cb0628b0733e0ade8e277fd0
parent d552920a02759cdc45d8507868de10ac2f5b9a18
author Joseph Lo <josephl@nvidia.com> 1352772288 +0800
committer Stephen Warren <swarren@nvidia.com> 1353017362 -0700

ARM: tegra: retain L2 content over CPU suspend/resume

The L2 RAM is in different power domain from the CPU cluster. So the
L2 content can be retained over CPU suspend/resume. To do that, we
need to disable L2 after the MMU is disabled, and enable L2 before
the MMU is enabled. But the L2 controller is in the same power domain
with the CPU cluster. We need to restore it's settings and re-enable
it after the power be resumed.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>