tree 1cd88a47a4b092553c0a319009bfde2a9cfe26af
parent 35fd2b840b6c02da9c0e8a31f52ebb89f51692e2
author Koji Matsuoka <koji.matsuoka.xm@renesas.com> 1460964690 +0900
committer Greg Kroah-Hartman <gregkh@linuxfoundation.org> 1504081308 +0200

drm: rcar-du: Fix display timing controller parameter

commit 9cdced8a39c04cf798ddb2a27cb5952f7d39f633 upstream.

There is a bug in the setting of the DES (Display Enable Signal)
register. This current setting occurs 1 dot left shift. The DES
register should be set minus one value about the specifying value
with H/W specification. This patch corrects it.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Thong Ho <thong.ho.px@rvc.renesas.com>
Signed-off-by: Nhan Nguyen <nhan.nguyen.yb@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>