tree ecd934129657753fe665c832e867e4bb39c53fd8
parent 5773d73a50771131a2e36f9d1c10d293ce920507
author Chandan Uddaraju <chandanu@codeaurora.org> 1456188203 -0800
committer Narendra Muppalla <NarendraM@codeaurora.org> 1484942451 -0800

clk: qcom: mdss: add Display-port pll clock driver support

Add support for new Display-port PLL clock driver to handle
different DP panel resolutions in msm8998. Add separate files
to support this new PHY PLL block.

CRs-Fixed: 1009740
Change-Id: Ic282c7e14fc6e23f4d044cb6a58249bdb4c8c2d8
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Narendra Muppalla <narendram@codeaurora.org>