Add initial version of Open Virtual Machine Firmware (OVMF) platform.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8398 6f19259b-4bc3-4df7-8a09-765794883524
diff --git a/OvmfPkg/AcpiTables/AcpiTables.inf b/OvmfPkg/AcpiTables/AcpiTables.inf
new file mode 100755
index 0000000..6669cc7
--- /dev/null
+++ b/OvmfPkg/AcpiTables/AcpiTables.inf
@@ -0,0 +1,42 @@
+#/** @file

+#  Component description file for PlatformAcpiTables module.

+#

+#  ACPI table data and ASL sources required to boot the platform.

+#

+#  Copyright (c) 2008, Intel Corporation. <BR>

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = PlatformAcpiTables

+  FILE_GUID                      = 7E374E25-8E01-4FEE-87F2-390C23C606CD

+  MODULE_TYPE                    = DXE_DRIVER

+  VERSION_STRING                 = 1.0

+  EDK_RELEASE_VERSION            = 0x00020000

+  EFI_SPECIFICATION_VERSION      = 0x00020000

+

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC

+#

+

+[Sources.common]

+  Platform.h

+  Madt.aslc

+  Facp.aslc

+  Facs.aslc

+  Dsdt.asl

+

+[Packages]

+  MdePkg/MdePkg.dec

+

diff --git a/OvmfPkg/AcpiTables/Dsdt.asl b/OvmfPkg/AcpiTables/Dsdt.asl
new file mode 100755
index 0000000..91ec944
--- /dev/null
+++ b/OvmfPkg/AcpiTables/Dsdt.asl
@@ -0,0 +1,442 @@
+/** @file

+  Contains root level name space objects for the platform

+  

+  Copyright (c) 2008, Intel Corporation<BR> All rights

+  reserved. This program and the accompanying materials are

+  licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+  

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/ 

+

+DefinitionBlock ("Dsdt.aml", "DSDT", 1, "INTEL ", "OVMF    ", 3) {

+  //

+  // System Sleep States

+  //

+  Name (\_S0, Package () {5, 0, 0, 0})

+  Name (\_S4, Package () {1, 0, 0, 0})

+  Name (\_S5, Package () {0, 0, 0, 0})

+

+  //

+  //  System Bus

+  //

+  Scope (\_SB) {

+    //

+    // PCI Root Bridge

+    //

+    Device (PCI0) {

+      Name (_HID, EISAID ("PNP0A03"))

+      Name (_ADR, 0x00000000)

+      Name (_BBN, 0x00)

+      Name (_UID, 0x00)

+

+      //

+      // BUS, I/O, and MMIO resources

+      //

+      Name (_CRS, ResourceTemplate () {

+        WORDBusNumber (          // Bus number resource (0); the bridge produces bus numbers for its subsequent buses

+          ResourceProducer,      // bit 0 of general flags is 1

+          MinFixed,              // Range is fixed

+          MaxFixed,              // Range is fixed

+          PosDecode,             // PosDecode

+          0x0000,                // Granularity

+          0x0000,                // Min

+          0x00FF,                // Max

+          0x0000,                // Translation

+          0x0100                 // Range Length = Max-Min+1

+          )

+

+        IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08)       //Consumed resource (0xCF8-0xCFF)

+

+        WORDIO (                 // Consumed-and-produced resource (all I/O below CF8)

+          ResourceProducer,      // bit 0 of general flags is 0

+          MinFixed,              // Range is fixed

+          MaxFixed,              // Range is fixed

+          PosDecode,             

+          EntireRange,

+          0x0000,                // Granularity

+          0x0000,                // Min

+          0x0CF7,                // Max

+          0x0000,                // Translation

+          0x0CF8                 // Range Length

+          )

+

+        WORDIO (                 // Consumed-and-produced resource (all I/O above CFF)

+          ResourceProducer,      // bit 0 of general flags is 0

+          MinFixed,              // Range is fixed

+          MaxFixed,              // Range is fixed

+          PosDecode,             

+          EntireRange,

+          0x0000,                // Granularity

+          0x0D00,                // Min

+          0xFFFF,                // Max

+          0x0000,                // Translation

+          0xF300                 // Range Length

+          )

+

+        DWORDMEMORY (            // Descriptor for legacy VGA video RAM

+          ResourceProducer,      // bit 0 of general flags is 0

+          PosDecode,

+          MinFixed,              // Range is fixed

+          MaxFixed,              // Range is Fixed

+          Cacheable,

+          ReadWrite,

+          0x00000000,            // Granularity

+          0x000A0000,            // Min

+          0x000BFFFF,            // Max

+          0x00000000,            // Translation

+          0x00020000             // Range Length

+          )

+

+        DWORDMEMORY (            // Descriptor for linear frame buffer video RAM

+          ResourceProducer,      // bit 0 of general flags is 0

+          PosDecode,

+          MinFixed,              // Range is fixed

+          MaxFixed,              // Range is Fixed

+          Cacheable,

+          ReadWrite,

+          0x00000000,            // Granularity

+          0xF8000000,            // Min

+          0xFFFBFFFF,            // Max

+          0x00000000,            // Translation

+          0x07FC0000             // Range Length

+          )

+      })

+

+      //

+      // PCI Interrupt Routing Table - PIC Mode Only

+      //

+      Method (_PRT, 0, NotSerialized) {

+        Return (

+          Package () {

+            //

+            // Bus 0, Device 1

+            //

+            Package () {0x0001FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},

+            Package () {0x0001FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},

+            Package () {0x0001FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},

+            Package () {0x0001FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},

+            //

+            // Bus 0, Device 3

+            //

+            Package () {0x0003FFFF, 0x00, \_SB.PCI0.LPC.LNKA, 0x00},

+            Package () {0x0003FFFF, 0x01, \_SB.PCI0.LPC.LNKB, 0x00},

+            Package () {0x0003FFFF, 0x02, \_SB.PCI0.LPC.LNKC, 0x00},

+            Package () {0x0003FFFF, 0x03, \_SB.PCI0.LPC.LNKD, 0x00},

+          }

+        )

+      }

+

+      //

+      // PCI to ISA Bridge (Bus 0, Device 1, Function 0)

+      //

+      Device (LPC) {

+        Name (_ADR, 0x00010000)

+

+        //

+        // PCI Interrupt Routing Configuration Registers

+        //

+        OperationRegion (PRR0, PCI_Config, 0x60, 0x04)

+        Field (PRR0, ANYACC, NOLOCK, PRESERVE) {

+          PIRA, 8,

+          PIRB, 8,

+          PIRC, 8,

+          PIRD, 8

+        }

+

+        //

+        // _STA method for LNKA, LNKB, LNKC, LNKD

+        //

+        Method (PSTA, 1, NotSerialized) {

+          If (And (Arg0, 0x80)) {

+            Return (0x9)

+          } Else {

+            Return (0xB)

+          }

+        }

+

+        //

+        // _DIS method for LNKA, LNKB, LNKC, LNKD

+        //

+        Method (PDIS, 1, NotSerialized) {

+          Or (Arg0, 0x80, Arg0)

+        }

+

+        //

+        // _CRS method for LNKA, LNKB, LNKC, LNKD

+        //

+        Method (PCRS, 1, NotSerialized) {

+          Name (BUF0, ResourceTemplate () {IRQ (Level, ActiveLow, Shared){0}})

+          //

+          // Define references to buffer elements

+          //

+          CreateWordField (BUF0, 0x01, IRQW)  // IRQ low

+          //

+          // Write current settings into IRQ descriptor

+          //

+          If (And (Arg0, 0x80)) {

+            Store (Zero, Local0)

+          } Else {

+            Store (One, Local0)

+          }

+          //

+          // Shift 1 by value in register 70

+          //

+          ShiftLeft (Local0, And (Arg0, 0x0F), IRQW)   // Save in buffer

+          Return (BUF0)                                // Return Buf0 

+        }

+

+        //

+        // _PRS resource for LNKA, LNKB, LNKC, LNKD

+        //

+        Name (PPRS, ResourceTemplate () {

+          IRQ (Level, ActiveLow, Shared) {3, 4, 5, 7, 9, 10, 11, 12, 14, 15}

+        })

+

+        //

+        // _SRS method for LNKA, LNKB, LNKC, LNKD

+        //

+        Method (PSRS, 2, NotSerialized) {

+          CreateWordField (Arg1, 0x01, IRQW)      // IRQ low

+          FindSetRightBit (IRQW, Local0)          // Set IRQ

+          If (LNotEqual (IRQW, Zero)) {

+            And (Local0, 0x7F, Local0)

+            Decrement (Local0)

+          } Else {

+            Or (Local0, 0x80, Local0)

+          }

+          Store (Local0, Arg0)

+        }

+

+        //

+        // PCI IRQ Link A

+        //

+        Device (LNKA) {

+          Name (_HID, EISAID("PNP0C0F"))

+          Name (_UID, 1)

+

+          Method (_STA, 0, NotSerialized) { Return (PSTA (PIRA)) }

+          Method (_DIS, 0, NotSerialized) { PDIS (PIRA)  }

+          Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRA)) }

+          Method (_PRS, 0, NotSerialized) { Return (PPRS) }

+          Method (_SRS, 1, NotSerialized) { PSRS (PIRA, Arg0) } 

+        }

+

+        //

+        // PCI IRQ Link B

+        //

+        Device (LNKB) {

+          Name (_HID, EISAID("PNP0C0F"))

+          Name (_UID, 2)

+

+          Method (_STA, 0, NotSerialized) { Return (PSTA (PIRB)) }

+          Method (_DIS, 0, NotSerialized) { PDIS (PIRB) }

+          Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRB)) }

+          Method (_PRS, 0, NotSerialized) { Return (PPRS) }

+          Method (_SRS, 1, NotSerialized) { PSRS (PIRB, Arg0) } 

+        }

+

+        //

+        // PCI IRQ Link C

+        //

+        Device (LNKC) {

+          Name (_HID, EISAID("PNP0C0F"))

+          Name (_UID, 3)

+

+          Method (_STA, 0, NotSerialized) { Return (PSTA (PIRC)) }

+          Method (_DIS, 0, NotSerialized) { PDIS (PIRC) }

+          Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRC)) }

+          Method (_PRS, 0, NotSerialized) { Return (PPRS) }

+          Method (_SRS, 1, NotSerialized) { PSRS (PIRC, Arg0) } 

+        }

+

+        //

+        // PCI IRQ Link D

+        //

+        Device (LNKD) {

+          Name (_HID, EISAID("PNP0C0F"))

+          Name (_UID, 1)

+

+          Method (_STA, 0, NotSerialized) { Return (PSTA (PIRD)) }

+          Method (_DIS, 0, NotSerialized) { PDIS (PIRD) }

+          Method (_CRS, 0, NotSerialized) { Return (PCRS (PIRD)) }

+          Method (_PRS, 0, NotSerialized) { Return (PPRS) }

+          Method (_SRS, 1, NotSerialized) { PSRS (PIRD, Arg0) } 

+        }

+        

+        //

+        // Programmable Interrupt Controller (PIC)

+        //

+        Device(PIC) {

+          Name (_HID, EISAID ("PNP0000"))

+          Name (_CRS, ResourceTemplate () {

+            IO (Decode16, 0x020, 0x020, 0x00, 0x02)

+            IO (Decode16, 0x0A0, 0x0A0, 0x00, 0x02)

+            IO (Decode16, 0x4D0, 0x4D0, 0x00, 0x02)

+            IRQNoFlags () {2}

+          })

+        }

+

+        //

+        // ISA DMA 

+        //

+        Device (DMAC) {

+          Name (_HID, EISAID ("PNP0200")) 

+          Name (_CRS, ResourceTemplate () {

+            IO (Decode16, 0x00, 0x00, 0, 0x10)

+            IO (Decode16, 0x81, 0x81, 0, 0x03)

+            IO (Decode16, 0x87, 0x87, 0, 0x01)

+            IO (Decode16, 0x89, 0x89, 0, 0x03)

+            IO (Decode16, 0x8f, 0x8f, 0, 0x01)

+            IO (Decode16, 0xc0, 0xc0, 0, 0x20)

+            DMA (Compatibility, NotBusMaster, Transfer8) {4}

+          })

+        }

+

+        //

+        // 8254 Timer

+        //

+        Device(TMR) {

+          Name(_HID,EISAID("PNP0100"))

+          Name(_CRS, ResourceTemplate () {

+            IO (Decode16, 0x40, 0x40, 0x00, 0x04)

+            IRQNoFlags () {0}

+          })

+        }

+

+        //

+        // Real Time Clock

+        //

+        Device (RTC) {

+          Name (_HID, EISAID ("PNP0B00"))

+          Name (_CRS, ResourceTemplate () {

+            IO (Decode16, 0x70, 0x70, 0x00, 0x02)

+            IRQNoFlags () {8}

+          })

+        }

+

+        //

+        // PCAT Speaker

+        //

+        Device(SPKR) {

+          Name (_HID, EISAID("PNP0800"))

+          Name (_CRS, ResourceTemplate () {

+            IO (Decode16, 0x61, 0x61, 0x01, 0x01)

+          })

+        }

+

+        //

+        // Floating Point Coprocessor

+        //

+        Device(FPU) {

+          Name (_HID, EISAID("PNP0C04"))

+          Name (_CRS, ResourceTemplate () {

+            IO (Decode16, 0xF0, 0xF0, 0x00, 0x10)

+            IRQNoFlags () {13}

+          })

+        }

+

+        //

+        // Generic motherboard devices and pieces that don't fit anywhere else

+        //

+        Device(XTRA) {

+          Name (_HID, EISAID ("PNP0C02"))

+          Name (_UID, 0x01)

+          Name (_CRS, ResourceTemplate () {

+            IO (Decode16, 0x010, 0x010, 0x00, 0x10)

+            IO (Decode16, 0x022, 0x022, 0x00, 0x1E)

+            IO (Decode16, 0x044, 0x044, 0x00, 0x1C)

+            IO (Decode16, 0x062, 0x062, 0x00, 0x02)

+            IO (Decode16, 0x065, 0x065, 0x00, 0x0B)

+            IO (Decode16, 0x072, 0x072, 0x00, 0x0E)

+            IO (Decode16, 0x080, 0x080, 0x00, 0x01)

+            IO (Decode16, 0x084, 0x084, 0x00, 0x03)

+            IO (Decode16, 0x088, 0x088, 0x00, 0x01)

+            IO (Decode16, 0x08c, 0x08c, 0x00, 0x03)

+            IO (Decode16, 0x090, 0x090, 0x00, 0x10)

+            IO (Decode16, 0x0A2, 0x0A2, 0x00, 0x1E)

+            IO (Decode16, 0x0E0, 0x0E0, 0x00, 0x10)

+            IO (Decode16, 0x1E0, 0x1E0, 0x00, 0x10)

+            IO (Decode16, 0x160, 0x160, 0x00, 0x10)

+            IO (Decode16, 0x278, 0x278, 0x00, 0x08)

+            IO (Decode16, 0x370, 0x370, 0x00, 0x02)

+            IO (Decode16, 0x378, 0x378, 0x00, 0x08)

+            IO (Decode16, 0x400, 0x400, 0x00, 0x40)       // PMBLK1

+            IO (Decode16, 0x440, 0x440, 0x00, 0x10)

+            IO (Decode16, 0x678, 0x678, 0x00, 0x08)

+            IO (Decode16, 0x778, 0x778, 0x00, 0x08)

+            Memory32Fixed (ReadOnly, 0xFEC00000, 0x1000)  // IO APIC

+            Memory32Fixed (ReadOnly, 0xFEE00000, 0x1000)

+          })

+        }

+

+        //

+        // PS/2 Keyboard and PC/AT Enhanced Keyboard 101/102

+        //

+        Device (PS2K) {  

+          Name (_HID, EISAID ("PNP0303"))

+          Name (_CID, EISAID ("PNP030B"))

+          Name(_CRS,ResourceTemplate() {

+            IO (Decode16, 0x60, 0x60, 0x00, 0x01)

+            IO (Decode16, 0x64, 0x64, 0x00, 0x01)

+            IRQNoFlags () {1}

+          })

+        }

+

+        //

+        // PS/2 Mouse and Microsoft Mouse

+        //

+        Device (PS2M) {  // PS/2 stype mouse port

+          Name (_HID, EISAID ("PNP0F03"))

+          Name (_CID, EISAID ("PNP0F13"))

+          Name (_CRS, ResourceTemplate() {

+            IRQNoFlags () {12}

+          })

+        }

+

+        //

+        // UART Serial Port - COM1

+        //

+        Device (UAR1) {

+          Name (_HID, EISAID ("PNP0501"))

+          Name (_DDN, "COM1")

+          Name (_UID, 0x01)

+          Name(_CRS,ResourceTemplate() {

+            IO (Decode16, 0x3F8, 0x3F8, 0x01, 0x08)

+            IRQ (Edge, ActiveHigh, Exclusive, ) {4}

+          })

+        }

+

+        //

+        // UART Serial Port - COM2

+        //

+        Device (UAR2) {

+          Name (_HID, EISAID ("PNP0501"))

+          Name (_DDN, "COM2")

+          Name (_UID, 0x02)

+          Name(_CRS,ResourceTemplate() {

+            IO (Decode16, 0x2F8, 0x2F8, 0x01, 0x08)

+            IRQ (Edge, ActiveHigh, Exclusive, ) {3}

+          })

+        }

+

+        //

+        // Floppy Disk Controller

+        //

+        Device (FDC) {

+          Name (_HID, EISAID ("PNP0700"))

+          Name (_CRS,ResourceTemplate() {

+            IO (Decode16, 0x3F0, 0x3F0, 0x01, 0x06)

+            IO (Decode16, 0x3F7, 0x3F7, 0x01, 0x01)

+            IRQNoFlags () {6}

+            DMA (Compatibility, NotBusMaster, Transfer8) {2}

+          })

+        }

+      }

+    }

+  }

+}

+

diff --git a/OvmfPkg/AcpiTables/Facp.aslc b/OvmfPkg/AcpiTables/Facp.aslc
new file mode 100755
index 0000000..3e8a5b3
--- /dev/null
+++ b/OvmfPkg/AcpiTables/Facp.aslc
@@ -0,0 +1,79 @@
+/** @file

+  FACP Table

+  

+  Copyright (c) 2008 - 2009, Intel Corporation<BR> All rights

+  reserved. This program and the accompanying materials are

+  licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+  

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/ 

+ 

+#include "Platform.h"

+

+EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = {

+  EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE,

+  sizeof (EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE),

+  EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION,

+  0,                // to make sum of entire table == 0

+  EFI_ACPI_OEM_ID,         // OEMID is a 6 bytes long field

+  EFI_ACPI_OEM_TABLE_ID,      // OEM table identification(8 bytes long)

+  EFI_ACPI_OEM_REVISION,      // OEM revision number

+  EFI_ACPI_CREATOR_ID,        // ASL compiler vendor ID

+  EFI_ACPI_CREATOR_REVISION,  // ASL compiler revision number

+  0,                // Physical addesss of FACS

+  0,                // Physical address of DSDT

+  INT_MODEL,        // System Interrupt Model

+  RESERVED,         // reserved

+  SCI_INT_VECTOR,   // System vector of SCI interrupt

+  SMI_CMD_IO_PORT,  // Port address of SMI command port

+  ACPI_ENABLE,      // value to write to port smi_cmd to enable ACPI

+  ACPI_DISABLE,     // value to write to port smi_cmd to disable ACPI

+  S4BIOS_REQ,       // Value to write to SMI CMD port to enter the S4BIOS state

+  0xE2,             // PState control

+  PM1a_EVT_BLK,     // Port address of Power Mgt 1a Event Reg Blk

+  PM1b_EVT_BLK,     // Port address of Power Mgt 1b Event Reg Blk

+  PM1a_CNT_BLK,     // Port address of Power Mgt 1a Ctrl Reg Blk

+  PM1b_CNT_BLK,     // Port address of Power Mgt 1b Ctrl Reg Blk

+  PM2_CNT_BLK,      // Port address of Power Mgt 2  Ctrl Reg Blk

+  PM_TMR_BLK,       // Port address of Power Mgt Timer Ctrl Reg Blk

+  GPE0_BLK,         // Port addr of General Purpose Event 0 Reg Blk

+  GPE1_BLK,         // Port addr of General Purpose Event 1 Reg Blk

+  PM1_EVT_LEN,      // Byte Length of ports at pm1X_evt_blk

+  PM1_CNT_LEN,      // Byte Length of ports at pm1X_cnt_blk

+  PM2_CNT_LEN,      // Byte Length of ports at pm2_cnt_blk

+  PM_TM_LEN,        // Byte Length of ports at pm_tm_blk

+  GPE0_BLK_LEN,     // Byte Length of ports at gpe0_blk

+  GPE1_BLK_LEN,     // Byte Length of ports at gpe1_blk

+  GPE1_BASE,        // offset in gpe model where gpe1 events start

+  0xE3,             // _CST support

+  P_LVL2_LAT,       // worst case HW latency to enter/exit C2 state

+  P_LVL3_LAT,       // worst case HW latency to enter/exit C3 state

+  FLUSH_SIZE,       // Size of area read to flush caches

+  FLUSH_STRIDE,     // Stride used in flushing caches

+  DUTY_OFFSET,      // bit location of duty cycle field in p_cnt reg

+  DUTY_WIDTH,       // bit width of duty cycle field in p_cnt reg

+  DAY_ALRM,         // index to day-of-month alarm in RTC CMOS RAM

+  MON_ALRM,         // index to month-of-year alarm in RTC CMOS RAM

+  CENTURY,          // index to century in RTC CMOS RAM

+  0x03,             // Boot architecture flag

+  0x00,             // Boot architecture flag

+  RESERVED,         // reserved 

+  FLAG

+};

+

+

+VOID*

+ReferenceAcpiTable (

+  VOID

+  )

+{

+  //

+  // Reference the table being generated to prevent the optimizer from removing the 

+  // data structure from the exeutable

+  //

+  return (VOID*)&FACP;

+}

diff --git a/OvmfPkg/AcpiTables/Facs.aslc b/OvmfPkg/AcpiTables/Facs.aslc
new file mode 100755
index 0000000..4179487
--- /dev/null
+++ b/OvmfPkg/AcpiTables/Facs.aslc
@@ -0,0 +1,82 @@
+/** @file

+  FACS Table

+  

+  Copyright (c) 2008 - 2009, Intel Corporation<BR> All rights

+  reserved. This program and the accompanying materials are

+  licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+  

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/ 

+

+#include <IndustryStandard/Acpi.h>

+

+EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE FACS = {

+  EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE,

+  sizeof (EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE),

+

+  //

+  // Hardware Signature will be updated at runtime

+  //

+  0x00000000,

+  0x00,

+  0x00,

+  0x00,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE,

+  EFI_ACPI_RESERVED_BYTE

+};

+

+

+VOID*

+ReferenceAcpiTable (

+  VOID

+  )

+{

+  //

+  // Reference the table being generated to prevent the optimizer from removing the 

+  // data structure from the exeutable

+  //

+  return (VOID*)&FACS;

+}

+

diff --git a/OvmfPkg/AcpiTables/Madt.aslc b/OvmfPkg/AcpiTables/Madt.aslc
new file mode 100755
index 0000000..c2c4a69
--- /dev/null
+++ b/OvmfPkg/AcpiTables/Madt.aslc
@@ -0,0 +1,155 @@
+/** @file

+  MADT Table

+

+  This file contains a structure definition for the ACPI 1.0 Multiple APIC 

+  Description Table (MADT).  

+  

+  Copyright (c) 2008 - 2009, Intel Corporation<BR> All rights

+  reserved. This program and the accompanying materials are

+  licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+  

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/ 

+

+#include <IndustryStandard/Acpi.h>

+

+//

+// MADT Definitions

+//

+#define EFI_ACPI_OEM_MADT_REVISION 0x00000000 // TBD

+

+//

+// Local APIC address

+//

+#define EFI_ACPI_LOCAL_APIC_ADDRESS 0xFEE00000 // TBD

+

+//

+// Multiple APIC Flags are defined in AcpiX.0.h

+//

+#define EFI_ACPI_1_0_MULTIPLE_APIC_FLAGS (EFI_ACPI_1_0_PCAT_COMPAT)

+

+//

+// Define the number of each table type.

+// This is where the table layout is modified.

+//

+#define EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT           1

+#define EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT      2

+#define EFI_ACPI_IO_APIC_COUNT                        1

+

+//

+// Ensure proper structure formats

+//

+#pragma pack (1)

+

+//

+// ACPI 1.0 MADT structure

+//

+typedef struct {

+  EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;

+

+#if EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT > 0

+  EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE           LocalApic[EFI_ACPI_PROCESSOR_LOCAL_APIC_COUNT];

+#endif

+

+#if EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT > 0

+  EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE      Iso[EFI_ACPI_INTERRUPT_SOURCE_OVERRIDE_COUNT];

+#endif

+

+#if EFI_ACPI_IO_APIC_COUNT > 0

+  EFI_ACPI_1_0_IO_APIC_STRUCTURE                        IoApic[EFI_ACPI_IO_APIC_COUNT];

+#endif

+

+} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;

+

+#pragma pack ()

+

+//

+// Multiple APIC Description Table

+//

+EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {

+  EFI_ACPI_1_0_APIC_SIGNATURE,

+  sizeof (EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE),

+  EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION,

+

+  //

+  // Checksum will be updated at runtime

+  //

+  0x00,

+  

+  //

+  // It is expected that these values will be programmed at runtime

+  //

+  ' ', ' ', ' ', ' ', ' ', ' ',

+  

+  0,

+  EFI_ACPI_OEM_MADT_REVISION,

+  0,

+  0,

+

+  //

+  // MADT specific fields

+  //

+  EFI_ACPI_LOCAL_APIC_ADDRESS,

+  EFI_ACPI_1_0_MULTIPLE_APIC_FLAGS,

+  

+  //

+  // Processor Local APIC Structure

+  //

+

+  EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC,                        // Type

+  sizeof (EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE),     // Length

+  0x01,                                                     // Processor ID

+  0x00,                                                     // Local APIC ID

+  0x00000001,                                               // Flags - Enabled by default

+

+  //

+  // Interrupt Source Override Structure

+  //

+

+  //

+  // IRQ0=>IRQ2 Interrupt Source Override Structure

+  //

+  EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE,                   // Type

+  sizeof (EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length

+  0x00,                                                     // Bus - ISA

+  0x00,                                                     // Source - IRQ0

+  0x00000002,                                               // Global System Interrupt - IRQ2

+  0x0000,                                                   // Flags - Conforms to specifications of the bus

+

+  //

+  // ISO (SCI Active High) Interrupt Source Override Structure

+  //

+  EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE,                   // Type

+  sizeof (EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE),// Length

+  0x00,                                                     // Bus - ISA

+  0x09,                                                     // Source - IRQ0

+  0x00000009,                                               // Global System Interrupt - IRQ2

+  0x000D,                                                   // Flags - Level-tiggered, Active High

+

+  //

+  // IO APIC Structure

+  //

+  EFI_ACPI_1_0_IO_APIC,                                     // Type

+  sizeof (EFI_ACPI_1_0_IO_APIC_STRUCTURE),                  // Length

+  0x02,                                                     // IO APIC ID

+  EFI_ACPI_RESERVED_BYTE,                                   // Reserved

+  0xFEC00000,                                               // IO APIC Address (physical)

+  0x00000000                                                // Global System Interrupt Base

+};

+

+

+VOID*

+ReferenceAcpiTable (

+  VOID

+  )

+{

+  //

+  // Reference the table being generated to prevent the optimizer from removing the 

+  // data structure from the exeutable

+  //

+  return (VOID*)&Madt;

+}

diff --git a/OvmfPkg/AcpiTables/Platform.h b/OvmfPkg/AcpiTables/Platform.h
new file mode 100755
index 0000000..12b3d1d
--- /dev/null
+++ b/OvmfPkg/AcpiTables/Platform.h
@@ -0,0 +1,64 @@
+/** @file

+  Platform specific defines for constructing ACPI tables

+

+  Copyright (c) 2008, Intel Corporation<BR> All rights

+  reserved. This program and the accompanying materials are

+  licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+  

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/ 

+

+#ifndef _Platform_h_INCLUDED_

+#define _Platform_h_INCLUDED_

+

+#include <PiDxe.h> 

+#include <IndustryStandard/Acpi.h>

+

+//

+// ACPI table information used to initialize tables.

+//

+#define EFI_ACPI_OEM_ID           'O','V','M','F',' ',' '   // OEMID 6 bytes long

+#define EFI_ACPI_OEM_TABLE_ID     SIGNATURE_64('O','V','M','F','E','D','K','2') // OEM table id 8 bytes long

+#define EFI_ACPI_OEM_REVISION     0x02000820

+#define EFI_ACPI_CREATOR_ID       SIGNATURE_32('O','V','M','F')

+#define EFI_ACPI_CREATOR_REVISION 0x00000097

+

+#define INT_MODEL       0x01

+#define SCI_INT_VECTOR  0x0009 

+#define SMI_CMD_IO_PORT 0x000000B2

+#define ACPI_ENABLE     0x0E1

+#define ACPI_DISABLE    0x01E

+#define S4BIOS_REQ      0x00

+#define PM1a_EVT_BLK    0x00000400

+#define PM1b_EVT_BLK    0x00000000

+#define PM1a_CNT_BLK    0x00000404

+#define PM1b_CNT_BLK    0x00000000

+#define PM2_CNT_BLK     0x00000022

+#define PM_TMR_BLK      0x00000408

+#define GPE0_BLK        0x0000040C

+#define GPE1_BLK        0x00000000

+#define PM1_EVT_LEN     0x04

+#define PM1_CNT_LEN     0x02

+#define PM2_CNT_LEN     0x01

+#define PM_TM_LEN       0x04

+#define GPE0_BLK_LEN    0x04

+#define GPE1_BLK_LEN    0x00

+#define GPE1_BASE       0x00

+#define RESERVED        0x00

+#define P_LVL2_LAT      0x0065

+#define P_LVL3_LAT      0x03E9

+#define FLUSH_SIZE      0x0400

+#define FLUSH_STRIDE    0x0010

+#define DUTY_OFFSET     0x00

+#define DUTY_WIDTH      0x00

+#define DAY_ALRM        0x0D

+#define MON_ALRM        0x00

+#define CENTURY         0x00

+#define FLAG            EFI_ACPI_1_0_WBINVD | EFI_ACPI_1_0_PROC_C1 | EFI_ACPI_1_0_SLP_BUTTON | EFI_ACPI_1_0_RTC_S4 | EFI_ACPI_1_0_TMR_VAL_EXT

+

+#endif

+

diff --git a/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c b/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c
new file mode 100755
index 0000000..949a89d
--- /dev/null
+++ b/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.c
@@ -0,0 +1,222 @@
+/** @file

+  ACPI Timer implements one instance of Timer Library.

+

+  Copyright (c) 2008, Intel Corporation<BR> All rights

+  reserved. This program and the accompanying materials are

+  licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+  

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/ 

+

+#include <Base.h>

+#include <Library/TimerLib.h>

+#include <Library/BaseLib.h>

+#include <Library/IoLib.h>

+#include <Library/PciLib.h>

+

+#define ACPI_TIMER_FREQUENCY   3579545

+#define ACPI_TIMER_COUNT_SIZE  0x01000000

+

+/**

+  The constructor function enables ACPI IO space.

+

+  If ACPI I/O space not enabled, this function will enable it.

+  It will always return RETURN_SUCCESS.

+

+  @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.

+

+**/

+RETURN_STATUS

+EFIAPI

+AcpiTimerLibConstructor (

+  VOID

+  )

+{

+  UINT8 Device;

+

+  Device = 1;

+  // Device = 7;

+

+  //

+  // ACPI Timer enable is in Bus 0, Device ?, Function 3

+  //

+  PciOr8         (PCI_LIB_ADDRESS (0,Device,3,0x04), 0x01);

+  PciAndThenOr32 (PCI_LIB_ADDRESS (0,Device,3,0x40), (UINT32) ~0xfc0, 0x400);

+  PciOr8         (PCI_LIB_ADDRESS (0,Device,3,0x80), 0x01);  return RETURN_SUCCESS;

+}

+

+/**

+  Internal function to read the current tick counter of ACPI.

+

+  Internal function to read the current tick counter of ACPI.

+

+  @return The tick counter read.

+

+**/

+STATIC

+UINT32

+InternalAcpiGetTimerTick (

+  VOID

+  )

+{

+  return IoRead32 (0x408);

+}

+

+/**

+  Stalls the CPU for at least the given number of ticks.

+

+  Stalls the CPU for at least the given number of ticks. It's invoked by

+  MicroSecondDelay() and NanoSecondDelay().

+

+  @param  Delay     A period of time to delay in ticks.

+

+**/

+STATIC

+VOID

+InternalAcpiDelay (

+  IN      UINT32                    Delay

+  )

+{

+  UINT32                            Ticks;

+  UINT32                            Times;

+

+  Times    = Delay >> 22;

+  Delay   &= BIT22 - 1;

+  do {

+    //

+    // The target timer count is calculated here

+    //

+    Ticks    = InternalAcpiGetTimerTick () + Delay;

+    Delay    = BIT22;

+    //

+    // Wait until time out

+    // Delay >= 2^23 could not be handled by this function

+    // Timer wrap-arounds are handled correctly by this function

+    //

+    while (((Ticks - InternalAcpiGetTimerTick ()) & BIT23) == 0) {

+      CpuPause ();

+    }

+  } while (Times-- > 0);

+}

+

+/**

+  Stalls the CPU for at least the given number of microseconds.

+

+  Stalls the CPU for the number of microseconds specified by MicroSeconds.

+

+  @param  MicroSeconds  The minimum number of microseconds to delay.

+

+  @return MicroSeconds

+

+**/

+UINTN

+EFIAPI

+MicroSecondDelay (

+  IN      UINTN                     MicroSeconds

+  )

+{

+  InternalAcpiDelay (

+    (UINT32)DivU64x32 (

+              MultU64x32 (

+                MicroSeconds,

+                ACPI_TIMER_FREQUENCY

+                ),

+              1000000u

+              )

+    );

+  return MicroSeconds;

+}

+

+/**

+  Stalls the CPU for at least the given number of nanoseconds.

+

+  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.

+

+  @param  NanoSeconds The minimum number of nanoseconds to delay.

+

+  @return NanoSeconds

+

+**/

+UINTN

+EFIAPI

+NanoSecondDelay (

+  IN      UINTN                     NanoSeconds

+  )

+{

+  InternalAcpiDelay (

+    (UINT32)DivU64x32 (

+              MultU64x32 (

+                NanoSeconds,

+                ACPI_TIMER_FREQUENCY

+                ),

+              1000000000u

+              )

+    );

+  return NanoSeconds;

+}

+

+/**

+  Retrieves the current value of a 64-bit free running performance counter.

+

+  Retrieves the current value of a 64-bit free running performance counter. The

+  counter can either count up by 1 or count down by 1. If the physical

+  performance counter counts by a larger increment, then the counter values

+  must be translated. The properties of the counter can be retrieved from

+  GetPerformanceCounterProperties().

+

+  @return The current value of the free running performance counter.

+

+**/

+UINT64

+EFIAPI

+GetPerformanceCounter (

+  VOID

+  )

+{

+  return (UINT64)InternalAcpiGetTimerTick ();

+}

+

+/**

+  Retrieves the 64-bit frequency in Hz and the range of performance counter

+  values.

+

+  If StartValue is not NULL, then the value that the performance counter starts

+  with immediately after is it rolls over is returned in StartValue. If

+  EndValue is not NULL, then the value that the performance counter end with

+  immediately before it rolls over is returned in EndValue. The 64-bit

+  frequency of the performance counter in Hz is always returned. If StartValue

+  is less than EndValue, then the performance counter counts up. If StartValue

+  is greater than EndValue, then the performance counter counts down. For

+  example, a 64-bit free running counter that counts up would have a StartValue

+  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter

+  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.

+

+  @param  StartValue  The value the performance counter starts with when it

+                      rolls over.

+  @param  EndValue    The value that the performance counter ends with before

+                      it rolls over.

+

+  @return The frequency in Hz.

+

+**/

+UINT64

+EFIAPI

+GetPerformanceCounterProperties (

+  OUT      UINT64                    *StartValue,  OPTIONAL

+  OUT      UINT64                    *EndValue     OPTIONAL

+  )

+{

+  if (StartValue != NULL) {

+    *StartValue = 0;

+  }

+

+  if (EndValue != NULL) {

+    *EndValue = ACPI_TIMER_COUNT_SIZE - 1;

+  }

+

+  return ACPI_TIMER_FREQUENCY;

+}

diff --git a/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf b/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf
new file mode 100755
index 0000000..9e5767d
--- /dev/null
+++ b/OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf
@@ -0,0 +1,43 @@
+#/** @file

+#  ACPI Timer Library Instance.

+#

+#  Copyright (c) 2008, Intel Corporation. <BR>

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#  

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#  

+#**/

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = AcpiTimerLib

+  FILE_GUID                      = c300b1d9-31d4-4868-9de9-2f3551ff2c69

+  MODULE_TYPE                    = BASE

+  VERSION_STRING                 = 1.0

+  LIBRARY_CLASS                  = TimerLib

+  EDK_RELEASE_VERSION            = 0x00020000

+  EFI_SPECIFICATION_VERSION      = 0x00020000

+

+  CONSTRUCTOR                    = AcpiTimerLibConstructor

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC

+#

+

+[Sources.common]

+  AcpiTimerLib.c

+

+[Packages]

+  MdePkg/MdePkg.dec

+

+[LibraryClasses]

+  BaseLib

+  PciLib

+  IoLib

+

diff --git a/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.c b/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.c
new file mode 100644
index 0000000..0afec23
--- /dev/null
+++ b/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.c
@@ -0,0 +1,1050 @@
+/** @file

+  Platform BDS customizations.

+

+  Copyright (c) 2004 - 2008, Intel Corporation. <BR>

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#include "BdsPlatform.h"

+

+

+//

+// BDS Platform Functions

+//

+VOID

+EFIAPI

+PlatformBdsInit (

+  IN EFI_BDS_ARCH_PROTOCOL_INSTANCE  *PrivateData

+  )

+/*++

+

+Routine Description:

+

+  Platform Bds init. Incude the platform firmware vendor, revision

+  and so crc check.

+

+Arguments:

+

+  PrivateData  - The EFI_BDS_ARCH_PROTOCOL_INSTANCE instance

+

+Returns:

+

+  None.

+

+--*/

+{

+  DEBUG ((EFI_D_INFO, "PlatformBdsInit\n"));

+}

+

+

+EFI_STATUS

+ConnectRootBridge (

+  VOID

+  )

+/*++

+

+Routine Description:

+

+  Connect RootBridge

+

+Arguments:

+

+  None.

+

+Returns:

+

+  EFI_SUCCESS             - Connect RootBridge successfully.

+  EFI_STATUS              - Connect RootBridge fail.

+

+--*/

+{

+  EFI_STATUS                Status;

+  EFI_HANDLE                RootHandle;

+

+  //

+  // Make all the PCI_IO protocols on PCI Seg 0 show up

+  //

+  BdsLibConnectDevicePath (gPlatformRootBridges[0]);

+

+  Status = gBS->LocateDevicePath (

+                  &gEfiDevicePathProtocolGuid,

+                  &gPlatformRootBridges[0],

+                  &RootHandle

+                  );

+  if (EFI_ERROR (Status)) {

+    return Status;

+  }

+

+  Status = gBS->ConnectController (RootHandle, NULL, NULL, FALSE);

+  if (EFI_ERROR (Status)) {

+    return Status;

+  }

+

+  return EFI_SUCCESS;

+}

+

+

+EFI_STATUS

+PrepareLpcBridgeDevicePath (

+  IN EFI_HANDLE                DeviceHandle

+  )

+/*++

+

+Routine Description:

+

+  Add IsaKeyboard to ConIn,

+  add IsaSerial to ConOut, ConIn, ErrOut.

+  LPC Bridge: 06 01 00

+

+Arguments:

+

+  DeviceHandle            - Handle of PCIIO protocol.

+

+Returns:

+

+  EFI_SUCCESS             - LPC bridge is added to ConOut, ConIn, and ErrOut.

+  EFI_STATUS              - No LPC bridge is added.

+

+--*/

+{

+  EFI_STATUS                Status;

+  EFI_DEVICE_PATH_PROTOCOL  *DevicePath;

+  EFI_DEVICE_PATH_PROTOCOL  *TempDevicePath;

+  CHAR16                    *DevPathStr;

+

+  DevicePath = NULL;

+  Status = gBS->HandleProtocol (

+                  DeviceHandle,

+                  &gEfiDevicePathProtocolGuid,

+                  (VOID*)&DevicePath

+                  );

+  if (EFI_ERROR (Status)) {

+    return Status;

+  }

+  TempDevicePath = DevicePath;

+

+  //

+  // Register Keyboard

+  //

+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gPnpPs2KeyboardDeviceNode);

+

+  BdsLibUpdateConsoleVariable (VarConsoleInp, DevicePath, NULL);

+

+  //

+  // Register COM1

+  //

+  DevicePath = TempDevicePath;

+  gPnp16550ComPortDeviceNode.UID = 0;

+

+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gPnp16550ComPortDeviceNode);

+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);

+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);

+

+  //

+  // Print Device Path

+  //

+  DevPathStr = DevicePathToStr(DevicePath);

+  DEBUG((

+    EFI_D_INFO,

+    "BdsPlatform.c+%d: COM%d DevPath: %s\n",

+    __LINE__,

+    gPnp16550ComPortDeviceNode.UID + 1,

+    DevPathStr

+    ));

+  FreePool(DevPathStr);

+

+  BdsLibUpdateConsoleVariable (VarConsoleOut, DevicePath, NULL);

+  BdsLibUpdateConsoleVariable (VarConsoleInp, DevicePath, NULL);

+  BdsLibUpdateConsoleVariable (VarErrorOut, DevicePath, NULL);

+

+  //

+  // Register COM2

+  //

+  DevicePath = TempDevicePath;

+  gPnp16550ComPortDeviceNode.UID = 1;

+

+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gPnp16550ComPortDeviceNode);

+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);

+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);

+

+  //

+  // Print Device Path

+  //

+  DevPathStr = DevicePathToStr(DevicePath);

+  DEBUG((

+    EFI_D_INFO,

+    "BdsPlatform.c+%d: COM%d DevPath: %s\n",

+    __LINE__,

+    gPnp16550ComPortDeviceNode.UID + 1,

+    DevPathStr

+    ));

+  FreePool(DevPathStr);

+

+  BdsLibUpdateConsoleVariable (VarConsoleOut, DevicePath, NULL);

+  BdsLibUpdateConsoleVariable (VarConsoleInp, DevicePath, NULL);

+  BdsLibUpdateConsoleVariable (VarErrorOut, DevicePath, NULL);

+

+  return EFI_SUCCESS;

+}

+

+EFI_STATUS

+GetGopDevicePath (

+   IN  EFI_DEVICE_PATH_PROTOCOL *PciDevicePath,

+   OUT EFI_DEVICE_PATH_PROTOCOL **GopDevicePath

+   )

+{

+  UINTN                           Index;

+  EFI_STATUS                      Status;

+  EFI_HANDLE                      PciDeviceHandle;

+  EFI_DEVICE_PATH_PROTOCOL        *TempDevicePath;

+  EFI_DEVICE_PATH_PROTOCOL        *TempPciDevicePath;

+  UINTN                           GopHandleCount;

+  EFI_HANDLE                      *GopHandleBuffer;

+

+  if (PciDevicePath == NULL || GopDevicePath == NULL) {

+    return EFI_INVALID_PARAMETER;

+  }

+

+  //

+  // Initialize the GopDevicePath to be PciDevicePath

+  //

+  *GopDevicePath    = PciDevicePath;

+  TempPciDevicePath = PciDevicePath;

+

+  Status = gBS->LocateDevicePath (

+                  &gEfiDevicePathProtocolGuid,

+                  &TempPciDevicePath,

+                  &PciDeviceHandle

+                  );

+  if (EFI_ERROR (Status)) {

+    return Status;

+  }

+

+  //

+  // Try to connect this handle, so that GOP dirver could start on this

+  // device and create child handles with GraphicsOutput Protocol installed

+  // on them, then we get device paths of these child handles and select

+  // them as possible console device.

+  //

+  gBS->ConnectController (PciDeviceHandle, NULL, NULL, FALSE);

+

+  Status = gBS->LocateHandleBuffer (

+                  ByProtocol,

+                  &gEfiGraphicsOutputProtocolGuid,

+                  NULL,

+                  &GopHandleCount,

+                  &GopHandleBuffer

+                  );

+  if (!EFI_ERROR (Status)) {

+    //

+    // Add all the child handles as possible Console Device

+    //

+    for (Index = 0; Index < GopHandleCount; Index++) {

+      Status = gBS->HandleProtocol (GopHandleBuffer[Index], &gEfiDevicePathProtocolGuid, (VOID*)&TempDevicePath);

+      if (EFI_ERROR (Status)) {

+        continue;

+      }

+      if (CompareMem (

+            PciDevicePath,

+            TempDevicePath,

+            GetDevicePathSize (PciDevicePath) - END_DEVICE_PATH_LENGTH

+            ) == 0) {

+        //

+        // In current implementation, we only enable one of the child handles

+        // as console device, i.e. sotre one of the child handle's device

+        // path to variable "ConOut"

+        // In futhure, we could select all child handles to be console device

+        //

+

+        *GopDevicePath = TempDevicePath;

+

+        //

+        // Delete the PCI device's path that added by GetPlugInPciVgaDevicePath()

+        // Add the integrity GOP device path.

+        //

+        BdsLibUpdateConsoleVariable (VarConsoleOutDev, NULL, PciDevicePath);

+        BdsLibUpdateConsoleVariable (VarConsoleOutDev, TempDevicePath, NULL);

+      }

+    }

+    gBS->FreePool (GopHandleBuffer);

+  }

+

+  return EFI_SUCCESS;

+}

+

+EFI_STATUS

+PreparePciVgaDevicePath (

+  IN EFI_HANDLE                DeviceHandle

+  )

+/*++

+

+Routine Description:

+

+  Add PCI VGA to ConOut.

+  PCI VGA: 03 00 00

+

+Arguments:

+

+  DeviceHandle            - Handle of PCIIO protocol.

+

+Returns:

+

+  EFI_SUCCESS             - PCI VGA is added to ConOut.

+  EFI_STATUS              - No PCI VGA device is added.

+

+--*/

+{

+  EFI_STATUS                Status;

+  EFI_DEVICE_PATH_PROTOCOL  *DevicePath;

+  EFI_DEVICE_PATH_PROTOCOL  *GopDevicePath;

+

+  DevicePath = NULL;

+  Status = gBS->HandleProtocol (

+                  DeviceHandle,

+                  &gEfiDevicePathProtocolGuid,

+                  (VOID*)&DevicePath

+                  );

+  if (EFI_ERROR (Status)) {

+    return Status;

+  }

+

+  GetGopDevicePath (DevicePath, &GopDevicePath);

+  DevicePath = GopDevicePath;

+

+  BdsLibUpdateConsoleVariable (VarConsoleOut, DevicePath, NULL);

+

+  return EFI_SUCCESS;

+}

+

+EFI_STATUS

+PreparePciSerialDevicePath (

+  IN EFI_HANDLE                DeviceHandle

+  )

+/*++

+

+Routine Description:

+

+  Add PCI Serial to ConOut, ConIn, ErrOut.

+  PCI Serial: 07 00 02

+

+Arguments:

+

+  DeviceHandle            - Handle of PCIIO protocol.

+

+Returns:

+

+  EFI_SUCCESS             - PCI Serial is added to ConOut, ConIn, and ErrOut.

+  EFI_STATUS              - No PCI Serial device is added.

+

+--*/

+{

+  EFI_STATUS                Status;

+  EFI_DEVICE_PATH_PROTOCOL  *DevicePath;

+

+  DevicePath = NULL;

+  Status = gBS->HandleProtocol (

+                  DeviceHandle,

+                  &gEfiDevicePathProtocolGuid,

+                  (VOID*)&DevicePath

+                  );

+  if (EFI_ERROR (Status)) {

+    return Status;

+  }

+

+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gUartDeviceNode);

+  DevicePath = AppendDevicePathNode (DevicePath, (EFI_DEVICE_PATH_PROTOCOL *)&gTerminalTypeDeviceNode);

+

+  BdsLibUpdateConsoleVariable (VarConsoleOut, DevicePath, NULL);

+  BdsLibUpdateConsoleVariable (VarConsoleInp, DevicePath, NULL);

+  BdsLibUpdateConsoleVariable (VarErrorOut, DevicePath, NULL);

+

+  return EFI_SUCCESS;

+}

+

+EFI_STATUS

+DetectAndPreparePlatformPciDevicePath (

+  BOOLEAN DetectVgaOnly

+  )

+/*++

+

+Routine Description:

+

+  Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut

+

+Arguments:

+

+  DetectVgaOnly           - Only detect VGA device if it's TRUE.

+

+Returns:

+

+  EFI_SUCCESS             - PCI Device check and Console variable update successfully.

+  EFI_STATUS              - PCI Device check or Console variable update fail.

+

+--*/

+{

+  EFI_STATUS                Status;

+  UINTN                     HandleCount;

+  EFI_HANDLE                *HandleBuffer;

+  UINTN                     Index;

+  EFI_PCI_IO_PROTOCOL       *PciIo;

+  PCI_TYPE00                Pci;

+

+  //

+  // Start to check all the PciIo to find all possible device

+  //

+  HandleCount = 0;

+  HandleBuffer = NULL;

+  Status = gBS->LocateHandleBuffer (

+                  ByProtocol,

+                  &gEfiPciIoProtocolGuid,

+                  NULL,

+                  &HandleCount,

+                  &HandleBuffer

+                  );

+  if (EFI_ERROR (Status)) {

+    return Status;

+  }

+

+  for (Index = 0; Index < HandleCount; Index++) {

+    Status = gBS->HandleProtocol (HandleBuffer[Index], &gEfiPciIoProtocolGuid, (VOID*)&PciIo);

+    if (EFI_ERROR (Status)) {

+      continue;

+    }

+

+    //

+    // Check for all PCI device

+    //

+    Status = PciIo->Pci.Read (

+                      PciIo,

+                      EfiPciIoWidthUint32,

+                      0,

+                      sizeof (Pci) / sizeof (UINT32),

+                      &Pci

+                      );

+    if (EFI_ERROR (Status)) {

+      continue;

+    }

+

+    if (!DetectVgaOnly) {

+      //

+      // Here we decide whether it is LPC Bridge

+      //

+      if ((IS_PCI_LPC (&Pci)) ||

+          ((IS_PCI_ISA_PDECODE (&Pci)) &&

+           (Pci.Hdr.VendorId == 0x8086) &&

+           (Pci.Hdr.DeviceId == 0x7000)

+          )

+         ) {

+        Status = PciIo->Attributes (

+          PciIo,

+          EfiPciIoAttributeOperationEnable,

+          EFI_PCI_DEVICE_ENABLE,

+          NULL

+          );

+        //

+        // Add IsaKeyboard to ConIn,

+        // add IsaSerial to ConOut, ConIn, ErrOut

+        //

+        DEBUG ((EFI_D_INFO, "Find the LPC Bridge device\n"));

+        PrepareLpcBridgeDevicePath (HandleBuffer[Index]);

+        continue;

+      }

+      //

+      // Here we decide which Serial device to enable in PCI bus

+      //

+      if (IS_PCI_16550SERIAL (&Pci)) {

+        //

+        // Add them to ConOut, ConIn, ErrOut.

+        //

+        DEBUG ((EFI_D_INFO, "Find the 16550 SERIAL device\n"));

+        PreparePciSerialDevicePath (HandleBuffer[Index]);

+        continue;

+      }

+    }

+

+    if ((Pci.Hdr.VendorId == 0x8086) &&

+        (Pci.Hdr.DeviceId == 0x7010)

+       ) {

+      Status = PciIo->Attributes (

+        PciIo,

+        EfiPciIoAttributeOperationEnable,

+        EFI_PCI_DEVICE_ENABLE,

+        NULL

+        );

+     }

+

+    //

+    // Here we decide which VGA device to enable in PCI bus

+    //

+    if (IS_PCI_VGA (&Pci)) {

+      //

+      // Add them to ConOut.

+      //

+      DEBUG ((EFI_D_INFO, "Find the VGA device\n"));

+      PreparePciVgaDevicePath (HandleBuffer[Index]);

+      continue;

+    }

+  }

+

+  gBS->FreePool (HandleBuffer);

+

+  return EFI_SUCCESS;

+}

+

+

+EFI_STATUS

+PlatformBdsConnectConsole (

+  IN BDS_CONSOLE_CONNECT_ENTRY   *PlatformConsole

+  )

+/*++

+

+Routine Description:

+

+  Connect the predefined platform default console device. Always try to find

+  and enable the vga device if have.

+

+Arguments:

+

+  PlatformConsole         - Predfined platform default console device array.

+

+Returns:

+

+  EFI_SUCCESS             - Success connect at least one ConIn and ConOut

+                            device, there must have one ConOut device is

+                            active vga device.

+

+  EFI_STATUS              - Return the status of

+                            BdsLibConnectAllDefaultConsoles ()

+

+--*/

+{

+  EFI_STATUS                         Status;

+  UINTN                              Index;

+  EFI_DEVICE_PATH_PROTOCOL           *VarConout;

+  EFI_DEVICE_PATH_PROTOCOL           *VarConin;

+  UINTN                              DevicePathSize;

+

+  //

+  // Connect RootBridge

+  //

+  ConnectRootBridge ();

+

+  VarConout = BdsLibGetVariableAndSize (

+                VarConsoleOut,

+                &gEfiGlobalVariableGuid,

+                &DevicePathSize

+                );

+  VarConin = BdsLibGetVariableAndSize (

+               VarConsoleInp,

+               &gEfiGlobalVariableGuid,

+               &DevicePathSize

+               );

+

+  if (VarConout == NULL || VarConin == NULL) {

+    //

+    // Do platform specific PCI Device check and add them to ConOut, ConIn, ErrOut

+    //

+    DetectAndPreparePlatformPciDevicePath (FALSE);

+

+    //

+    // Have chance to connect the platform default console,

+    // the platform default console is the minimue device group

+    // the platform should support

+    //

+    for (Index = 0; PlatformConsole[Index].DevicePath != NULL; ++Index) {

+      //

+      // Update the console variable with the connect type

+      //

+      if ((PlatformConsole[Index].ConnectType & CONSOLE_IN) == CONSOLE_IN) {

+        BdsLibUpdateConsoleVariable (VarConsoleInp, PlatformConsole[Index].DevicePath, NULL);

+      }

+      if ((PlatformConsole[Index].ConnectType & CONSOLE_OUT) == CONSOLE_OUT) {

+        BdsLibUpdateConsoleVariable (VarConsoleOut, PlatformConsole[Index].DevicePath, NULL);

+      }

+      if ((PlatformConsole[Index].ConnectType & STD_ERROR) == STD_ERROR) {

+        BdsLibUpdateConsoleVariable (VarErrorOut, PlatformConsole[Index].DevicePath, NULL);

+      }

+    }

+  } else {

+    //

+    // Only detect VGA device and add them to ConOut

+    //

+    DetectAndPreparePlatformPciDevicePath (TRUE);

+  }

+

+  //

+  // Connect the all the default console with current cosole variable

+  //

+  Status = BdsLibConnectAllDefaultConsoles ();

+  if (EFI_ERROR (Status)) {

+    return Status;

+  }

+

+  return EFI_SUCCESS;

+}

+

+

+VOID

+PciInitialization (

+  )

+{

+  //

+  // Device 0 Function 0

+  //

+  PciWrite8 (PCI_LIB_ADDRESS (0,0,0,0x3c), 0x00);

+

+  //

+  // Device 1 Function 0

+  //

+  PciWrite8 (PCI_LIB_ADDRESS (0,1,0,0x3c), 0x00);

+  PciWrite8 (PCI_LIB_ADDRESS (0,1,0,0x60), 0x8b);

+  PciWrite8 (PCI_LIB_ADDRESS (0,1,0,0x61), 0x89);

+  PciWrite8 (PCI_LIB_ADDRESS (0,1,0,0x62), 0x0a);

+  PciWrite8 (PCI_LIB_ADDRESS (0,1,0,0x63), 0x89);

+  //PciWrite8 (PCI_LIB_ADDRESS (0,1,0,0x82), 0x02);

+

+  //

+  // Device 1 Function 1

+  //

+  PciWrite8 (PCI_LIB_ADDRESS (0,1,1,0x3c), 0x00);

+

+  //

+  // Device 1 Function 3

+  //

+  PciWrite8 (PCI_LIB_ADDRESS (0,1,3,0x3c), 0x0b);

+  PciWrite8 (PCI_LIB_ADDRESS (0,1,3,0x3d), 0x01);

+  PciWrite8 (PCI_LIB_ADDRESS (0,1,3,0x5f), 0x90);

+

+  //

+  // Device 2 Function 0

+  //

+  PciWrite8 (PCI_LIB_ADDRESS (0,2,0,0x3c), 0x00);

+

+  //

+  // Device 3 Function 0

+  //

+  PciWrite8 (PCI_LIB_ADDRESS (0,3,0,0x3c), 0x0b);

+  PciWrite8 (PCI_LIB_ADDRESS (0,3,0,0x3d), 0x01);

+}

+

+

+VOID

+PlatformBdsConnectSequence (

+  VOID

+  )

+/*++

+

+Routine Description:

+

+  Connect with predeined platform connect sequence,

+  the OEM/IBV can customize with their own connect sequence.

+

+Arguments:

+

+  None.

+

+Returns:

+

+  None.

+

+--*/

+{

+  UINTN Index;

+

+  DEBUG ((EFI_D_INFO, "PlatformBdsConnectSequence\n"));

+

+  Index = 0;

+

+  //

+  // Here we can get the customized platform connect sequence

+  // Notes: we can connect with new variable which record the

+  // last time boots connect device path sequence

+  //

+  while (gPlatformConnectSequence[Index] != NULL) {

+    //

+    // Build the platform boot option

+    //

+    BdsLibConnectDevicePath (gPlatformConnectSequence[Index]);

+    Index++;

+  }

+

+  //

+  // Just use the simple policy to connect all devices

+  //

+  BdsLibConnectAll ();

+

+  PciInitialization ();

+}

+

+VOID

+PlatformBdsGetDriverOption (

+  IN OUT LIST_ENTRY              *BdsDriverLists

+  )

+/*++

+

+Routine Description:

+

+  Load the predefined driver option, OEM/IBV can customize this

+  to load their own drivers

+

+Arguments:

+

+  BdsDriverLists  - The header of the driver option link list.

+

+Returns:

+

+  None.

+

+--*/

+{

+  DEBUG ((EFI_D_INFO, "PlatformBdsGetDriverOption\n"));

+  return;

+}

+

+VOID

+PlatformBdsDiagnostics (

+  IN EXTENDMEM_COVERAGE_LEVEL    MemoryTestLevel,

+  IN BOOLEAN                     QuietBoot

+  )

+/*++

+

+Routine Description:

+

+  Perform the platform diagnostic, such like test memory. OEM/IBV also

+  can customize this fuction to support specific platform diagnostic.

+

+Arguments:

+

+  MemoryTestLevel  - The memory test intensive level

+

+  QuietBoot        - Indicate if need to enable the quiet boot

+

+Returns:

+

+  None.

+

+--*/

+{

+  EFI_STATUS  Status;

+

+  DEBUG ((EFI_D_INFO, "PlatformBdsDiagnostics\n"));

+

+  //

+  // Here we can decide if we need to show

+  // the diagnostics screen

+  // Notes: this quiet boot code should be remove

+  // from the graphic lib

+  //

+  if (QuietBoot) {

+    EnableQuietBoot (&gEfiDefaultBmpLogoGuid);

+    //

+    // Perform system diagnostic

+    //

+    Status = BdsMemoryTest (MemoryTestLevel);

+    if (EFI_ERROR (Status)) {

+      DisableQuietBoot ();

+    }

+

+    return ;

+  }

+  //

+  // Perform system diagnostic

+  //

+  Status = BdsMemoryTest (MemoryTestLevel);

+}

+

+

+VOID

+EFIAPI

+PlatformBdsPolicyBehavior (

+  IN EFI_BDS_ARCH_PROTOCOL_INSTANCE  *PrivateData,

+  IN OUT LIST_ENTRY                  *DriverOptionList,

+  IN OUT LIST_ENTRY                  *BootOptionList

+  )

+/*++

+

+Routine Description:

+

+  The function will excute with as the platform policy, current policy

+  is driven by boot mode. IBV/OEM can customize this code for their specific

+  policy action.

+

+Arguments:

+

+  PrivateData      - The EFI_BDS_ARCH_PROTOCOL_INSTANCE instance

+

+  DriverOptionList - The header of the driver option link list

+

+  BootOptionList   - The header of the boot option link list

+

+Returns:

+

+  None.

+

+--*/

+{

+  EFI_STATUS                         Status;

+  UINT16                             Timeout;

+  EFI_EVENT                          UserInputDurationTime;

+  LIST_ENTRY                     *Link;

+  BDS_COMMON_OPTION                  *BootOption;

+  UINTN                              Index;

+  EFI_INPUT_KEY                      Key;

+  EFI_TPL                            OldTpl;

+

+  DEBUG ((EFI_D_INFO, "PlatformBdsPolicyBehavior\n"));

+

+  //

+  // Init the time out value

+  //

+  Timeout = PcdGet16 (PcdPlatformBootTimeOut);

+

+  //

+  // Load the driver option as the driver option list

+  //

+  PlatformBdsGetDriverOption (DriverOptionList);

+

+  //

+  // Get current Boot Mode

+  //

+  Status = BdsLibGetBootMode (&PrivateData->BootMode);

+  DEBUG ((EFI_D_ERROR, "Boot Mode:%x\n", PrivateData->BootMode));

+

+  //

+  // Go the different platform policy with different boot mode

+  // Notes: this part code can be change with the table policy

+  //

+  ASSERT (PrivateData->BootMode == BOOT_WITH_FULL_CONFIGURATION);

+  //

+  // Connect platform console

+  //

+  Status = PlatformBdsConnectConsole (gPlatformConsole);

+  if (EFI_ERROR (Status)) {

+    //

+    // Here OEM/IBV can customize with defined action

+    //

+    PlatformBdsNoConsoleAction ();

+  }

+  //

+  // Create a 300ms duration event to ensure user has enough input time to enter Setup

+  //

+  Status = gBS->CreateEvent (

+                  EVT_TIMER,

+                  0,

+                  NULL,

+                  NULL,

+                  &UserInputDurationTime

+                  );

+  ASSERT (Status == EFI_SUCCESS);

+  Status = gBS->SetTimer (UserInputDurationTime, TimerRelative, 3000000);

+  ASSERT (Status == EFI_SUCCESS);

+  //

+  // Memory test and Logo show

+  //

+  PlatformBdsDiagnostics (IGNORE, TRUE);

+

+  //

+  // Perform some platform specific connect sequence

+  //

+  PlatformBdsConnectSequence ();

+

+  //

+  // Give one chance to enter the setup if we

+  // have the time out

+  //

+  if (Timeout != 0) {

+    //PlatformBdsEnterFrontPage (Timeout, FALSE);

+  }

+

+  DEBUG ((EFI_D_INFO, "BdsLibConnectAll\n"));

+  BdsLibConnectAll ();

+  BdsLibEnumerateAllBootOption (BootOptionList);

+

+  //

+  // Please uncomment above ConnectAll and EnumerateAll code and remove following first boot

+  // checking code in real production tip.

+  //

+  // In BOOT_WITH_FULL_CONFIGURATION boot mode, should always connect every device

+  // and do enumerate all the default boot options. But in development system board, the boot mode

+  // cannot be BOOT_ASSUMING_NO_CONFIGURATION_CHANGES because the machine box

+  // is always open. So the following code only do the ConnectAll and EnumerateAll at first boot.

+  //

+  Status = BdsLibBuildOptionFromVar (BootOptionList, L"BootOrder");

+  if (EFI_ERROR(Status)) {

+    //

+    // If cannot find "BootOrder" variable,  it may be first boot.

+    // Try to connect all devices and enumerate all boot options here.

+    //

+    BdsLibConnectAll ();

+    BdsLibEnumerateAllBootOption (BootOptionList);

+  }

+

+  //

+  // To give the User a chance to enter Setup here, if user set TimeOut is 0.

+  // BDS should still give user a chance to enter Setup

+  //

+  // Connect first boot option, and then check user input before exit

+  //

+  for (Link = BootOptionList->ForwardLink; Link != BootOptionList;Link = Link->ForwardLink) {

+    BootOption = CR (Link, BDS_COMMON_OPTION, Link, BDS_LOAD_OPTION_SIGNATURE);

+    if (!IS_LOAD_OPTION_TYPE (BootOption->Attribute, LOAD_OPTION_ACTIVE)) {

+      //

+      // skip the header of the link list, becuase it has no boot option

+      //

+      continue;

+    } else {

+      //

+      // Make sure the boot option device path connected, but ignore the BBS device path

+      //

+      if (DevicePathType (BootOption->DevicePath) != BBS_DEVICE_PATH) {

+        BdsLibConnectDevicePath (BootOption->DevicePath);

+      }

+      break;

+    }

+  }

+

+  //

+  // Check whether the user input after the duration time has expired

+  //

+  OldTpl = EfiGetCurrentTpl();

+  gBS->RestoreTPL (TPL_APPLICATION);

+  gBS->WaitForEvent (1, &UserInputDurationTime, &Index);

+  gBS->CloseEvent (UserInputDurationTime);

+  Status = gST->ConIn->ReadKeyStroke (gST->ConIn, &Key);

+  gBS->RaiseTPL (OldTpl);

+

+  if (!EFI_ERROR (Status)) {

+    //

+    // Enter Setup if user input

+    //

+    Timeout = 0xffff;

+    PlatformBdsEnterFrontPage (Timeout, FALSE);

+  }

+

+  return ;

+}

+

+VOID

+EFIAPI

+PlatformBdsBootSuccess (

+  IN  BDS_COMMON_OPTION   *Option

+  )

+/*++

+

+Routine Description:

+

+  Hook point after a boot attempt succeeds. We don't expect a boot option to

+  return, so the EFI 1.0 specification defines that you will default to an

+  interactive mode and stop processing the BootOrder list in this case. This

+  is alos a platform implementation and can be customized by IBV/OEM.

+

+Arguments:

+

+  Option - Pointer to Boot Option that succeeded to boot.

+

+Returns:

+

+  None.

+

+--*/

+{

+  CHAR16  *TmpStr;

+

+  DEBUG ((EFI_D_INFO, "PlatformBdsBootSuccess\n"));

+  //

+  // If Boot returned with EFI_SUCCESS and there is not in the boot device

+  // select loop then we need to pop up a UI and wait for user input.

+  //

+  TmpStr = Option->StatusString;

+  if (TmpStr != NULL) {

+    BdsLibOutputStrings (gST->ConOut, TmpStr, Option->Description, L"\n\r", NULL);

+    FreePool (TmpStr);

+  }

+}

+

+VOID

+EFIAPI

+PlatformBdsBootFail (

+  IN  BDS_COMMON_OPTION  *Option,

+  IN  EFI_STATUS         Status,

+  IN  CHAR16             *ExitData,

+  IN  UINTN              ExitDataSize

+  )

+/*++

+

+Routine Description:

+

+  Hook point after a boot attempt fails.

+

+Arguments:

+

+  Option - Pointer to Boot Option that failed to boot.

+

+  Status - Status returned from failed boot.

+

+  ExitData - Exit data returned from failed boot.

+

+  ExitDataSize - Exit data size returned from failed boot.

+

+Returns:

+

+  None.

+

+--*/

+{

+  CHAR16  *TmpStr;

+

+  DEBUG ((EFI_D_INFO, "PlatformBdsBootFail\n"));

+

+  //

+  // If Boot returned with failed status then we need to pop up a UI and wait

+  // for user input.

+  //

+  TmpStr = Option->StatusString;

+  if (TmpStr != NULL) {

+    BdsLibOutputStrings (gST->ConOut, TmpStr, Option->Description, L"\n\r", NULL);

+    FreePool (TmpStr);

+  }

+}

+

+EFI_STATUS

+PlatformBdsNoConsoleAction (

+  VOID

+  )

+/*++

+

+Routine Description:

+

+  This function is remained for IBV/OEM to do some platform action,

+  if there no console device can be connected.

+

+Arguments:

+

+  None.

+

+Returns:

+

+  EFI_SUCCESS      - Direct return success now.

+

+--*/

+{

+  DEBUG ((EFI_D_INFO, "PlatformBdsNoConsoleAction\n"));

+  return EFI_SUCCESS;

+}

+

+EFI_STATUS

+EFIAPI

+PlatformBdsLockNonUpdatableFlash (

+  VOID

+  )

+{

+  DEBUG ((EFI_D_INFO, "PlatformBdsLockNonUpdatableFlash\n"));

+  return EFI_SUCCESS;

+}

diff --git a/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.h b/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.h
new file mode 100644
index 0000000..bc71cc3
--- /dev/null
+++ b/OvmfPkg/Library/PlatformBdsLib/BdsPlatform.h
@@ -0,0 +1,280 @@
+/** @file

+  Platform BDS customizations include file.

+

+  Copyright (c) 2006 - 2007, Intel Corporation

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+Module Name:

+

+  BdsPlatform.h

+

+Abstract:

+

+  Head file for BDS Platform specific code

+

+**/

+

+#ifndef _PLATFORM_SPECIFIC_BDS_PLATFORM_H_

+#define _PLATFORM_SPECIFIC_BDS_PLATFORM_H_

+

+

+#include <PiDxe.h>

+

+#include <IndustryStandard/Pci.h>

+#include <IndustryStandard/Acpi.h>

+#include <IndustryStandard/SmBios.h>

+//#include <IndustryStandard/LegacyBiosMpTable.h>

+

+#include <Library/DebugLib.h>

+#include <Library/BaseMemoryLib.h>

+#include <Library/UefiBootServicesTableLib.h>

+#include <Library/UefiRuntimeServicesTableLib.h>

+#include <Library/MemoryAllocationLib.h>

+#include <Library/BaseLib.h>

+#include <Library/PcdLib.h>

+#include <Library/PciLib.h>

+#include <Library/GenericBdsLib.h>

+#include <Library/PlatformBdsLib.h>

+#include <Library/HobLib.h>

+#include <Library/UefiLib.h>

+#include <Library/DxeServicesTableLib.h>

+#include <Library/DevicePathLib.h>

+#include <Library/IoLib.h>

+

+#include <Protocol/PciIo.h>

+#include <Protocol/FirmwareVolume2.h>

+

+#include <Guid/Logo.h>

+#include <Guid/Acpi.h>

+#include <Guid/SmBios.h>

+#include <Guid/Mps.h>

+#include <Guid/HobList.h>

+//#include <Guid/PciExpressBaseAddress.h>

+#include <Guid/GlobalVariable.h>

+#include <Guid/ShellFile.h>

+

+extern BDS_CONSOLE_CONNECT_ENTRY  gPlatformConsole[];

+extern EFI_DEVICE_PATH_PROTOCOL   *gPlatformConnectSequence[];

+extern EFI_DEVICE_PATH_PROTOCOL   *gPlatformDriverOption[];

+extern EFI_DEVICE_PATH_PROTOCOL   *gPlatformRootBridges[];

+extern ACPI_HID_DEVICE_PATH       gPnpPs2KeyboardDeviceNode;

+extern ACPI_HID_DEVICE_PATH       gPnp16550ComPortDeviceNode;

+extern UART_DEVICE_PATH           gUartDeviceNode;

+extern VENDOR_DEVICE_PATH         gTerminalTypeDeviceNode;

+//

+//

+//

+#define VarConsoleInpDev        L"ConInDev"

+#define VarConsoleInp           L"ConIn"

+#define VarConsoleOutDev        L"ConOutDev"

+#define VarConsoleOut           L"ConOut"

+#define VarErrorOutDev          L"ErrOutDev"

+#define VarErrorOut             L"ErrOut"

+

+#define PCI_DEVICE_PATH_NODE(Func, Dev) \

+  { \

+    HARDWARE_DEVICE_PATH, \

+    HW_PCI_DP, \

+    (UINT8) (sizeof (PCI_DEVICE_PATH)), \

+    (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8), \

+    (Func), \

+    (Dev) \

+  }

+

+#define PNPID_DEVICE_PATH_NODE(PnpId) \

+  { \

+    ACPI_DEVICE_PATH, \

+    ACPI_DP, \

+    (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \

+    (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8), \

+    EISA_PNP_ID((PnpId)), \

+    0 \

+  }

+

+#define gPciRootBridge \

+  PNPID_DEVICE_PATH_NODE(0x0A03)

+

+#define gPciIsaBridge \

+  PCI_DEVICE_PATH_NODE(0, 0x1f)

+

+#define gP2PBridge \

+  PCI_DEVICE_PATH_NODE(0, 0x1e)

+

+#define gPnpPs2Keyboard \

+  PNPID_DEVICE_PATH_NODE(0x0303)

+

+#define gPnp16550ComPort \

+  PNPID_DEVICE_PATH_NODE(0x0501)

+

+#define gUart \

+  { \

+    MESSAGING_DEVICE_PATH, \

+    MSG_UART_DP, \

+    (UINT8) (sizeof (UART_DEVICE_PATH)), \

+    (UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8), \

+    0, \

+    115200, \

+    8, \

+    1, \

+    1 \

+  }

+

+#define gPcAnsiTerminal \

+  { \

+    MESSAGING_DEVICE_PATH, \

+    MSG_VENDOR_DP, \

+    (UINT8) (sizeof (VENDOR_DEVICE_PATH)), \

+    (UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8), \

+    DEVICE_PATH_MESSAGING_PC_ANSI \

+  }

+

+#define gEndEntire \

+  { \

+    END_DEVICE_PATH_TYPE, \

+    END_ENTIRE_DEVICE_PATH_SUBTYPE, \

+    END_DEVICE_PATH_LENGTH, \

+    0 \

+  }

+

+#define PCI_CLASS_SCC          0x07

+#define PCI_SUBCLASS_SERIAL    0x00

+#define PCI_IF_16550           0x02

+#define IS_PCI_16550SERIAL(_p)           IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)

+

+#define EFI_SYSTEM_TABLE_MAX_ADDRESS 0xFFFFFFFF

+#define SYS_TABLE_PAD(ptr) (((~ptr) +1) & 0x07 )

+

+#define IS_PCI_ISA_PDECODE(_p)        IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)

+

+//

+// Platform Root Bridge

+//

+typedef struct {

+  ACPI_HID_DEVICE_PATH      PciRootBridge;

+  EFI_DEVICE_PATH_PROTOCOL  End;

+} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;

+

+typedef struct {

+  ACPI_HID_DEVICE_PATH      PciRootBridge;

+  PCI_DEVICE_PATH           IsaBridge;

+  ACPI_HID_DEVICE_PATH      Keyboard;

+  EFI_DEVICE_PATH_PROTOCOL  End;

+} PLATFORM_DUMMY_ISA_KEYBOARD_DEVICE_PATH;

+

+typedef struct {

+  ACPI_HID_DEVICE_PATH      PciRootBridge;

+  PCI_DEVICE_PATH           IsaBridge;

+  ACPI_HID_DEVICE_PATH      IsaSerial;

+  UART_DEVICE_PATH          Uart;

+  VENDOR_DEVICE_PATH        TerminalType;

+  EFI_DEVICE_PATH_PROTOCOL  End;

+} PLATFORM_DUMMY_ISA_SERIAL_DEVICE_PATH;

+

+typedef struct {

+  ACPI_HID_DEVICE_PATH      PciRootBridge;

+  PCI_DEVICE_PATH           VgaDevice;

+  EFI_DEVICE_PATH_PROTOCOL  End;

+} PLATFORM_DUMMY_PCI_VGA_DEVICE_PATH;

+

+typedef struct {

+  ACPI_HID_DEVICE_PATH      PciRootBridge;

+  PCI_DEVICE_PATH           PciBridge;

+  PCI_DEVICE_PATH           SerialDevice;

+  UART_DEVICE_PATH          Uart;

+  VENDOR_DEVICE_PATH        TerminalType;

+  EFI_DEVICE_PATH_PROTOCOL  End;

+} PLATFORM_DUMMY_PCI_SERIAL_DEVICE_PATH;

+

+//

+// the short form device path for Usb keyboard

+//

+#define CLASS_HID           3

+#define SUBCLASS_BOOT       1

+#define PROTOCOL_KEYBOARD   1

+

+typedef struct {

+  USB_CLASS_DEVICE_PATH           UsbClass;

+  EFI_DEVICE_PATH_PROTOCOL        End;

+} USB_CLASS_FORMAT_DEVICE_PATH;  

+

+extern PLATFORM_ROOT_BRIDGE_DEVICE_PATH  gPlatformRootBridge0;

+

+//

+// Platform BDS Functions

+//

+

+VOID

+PlatformBdsGetDriverOption (

+  IN LIST_ENTRY               *BdsDriverLists

+  );

+

+EFI_STATUS

+BdsMemoryTest (

+  EXTENDMEM_COVERAGE_LEVEL Level

+  );

+

+EFI_STATUS

+PlatformBdsShowProgress (

+  EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleForeground,

+  EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleBackground,

+  CHAR16                        *Title,

+  EFI_GRAPHICS_OUTPUT_BLT_PIXEL ProgressColor,

+  UINTN                         Progress,

+  UINTN                         PreviousValue

+  );

+

+VOID

+PlatformBdsConnectSequence (

+  VOID

+  );

+

+EFI_STATUS

+ProcessCapsules (

+  EFI_BOOT_MODE BootMode

+  );

+

+EFI_STATUS

+PlatformBdsConnectConsole (

+  IN BDS_CONSOLE_CONNECT_ENTRY   *PlatformConsole

+  );

+

+EFI_STATUS

+PlatformBdsNoConsoleAction (

+  VOID

+  );

+

+EFI_STATUS

+ConvertMpsTable (

+  IN OUT  VOID     **Table

+  );

+  

+EFI_STATUS

+ConvertSmbiosTable (

+  IN OUT VOID       **Table

+  );

+  

+EFI_STATUS

+ConvertAcpiTable (

+ IN      UINTN      TableLen,

+ IN OUT  VOID       **Table

+  );

+

+EFI_STATUS

+ConvertSystemTable (

+ IN     EFI_GUID   *TableGuid,

+ IN OUT VOID       **Table

+  );

+

+VOID

+PlatformBdsEnterFrontPage (

+  IN UINT16                 TimeoutDefault,

+  IN BOOLEAN                ConnectAllHappened

+  );

+

+#endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_

diff --git a/OvmfPkg/Library/PlatformBdsLib/PlatformBdsLib.inf b/OvmfPkg/Library/PlatformBdsLib/PlatformBdsLib.inf
new file mode 100644
index 0000000..caadd5b
--- /dev/null
+++ b/OvmfPkg/Library/PlatformBdsLib/PlatformBdsLib.inf
@@ -0,0 +1,59 @@
+#/** @file

+#  Platform BDS customizations library.

+#

+#  Copyright (c) 2007 - 2008, Intel Corporation. <BR>

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#  

+#**/

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = PlatformBdsLib

+  FILE_GUID                      = 143B5044-7C1B-4904-9778-EA16F1F3D554

+  MODULE_TYPE                    = DXE_DRIVER

+  VERSION_STRING                 = 1.0

+  LIBRARY_CLASS                  = PlatformBdsLib|DXE_DRIVER   

+  EDK_RELEASE_VERSION            = 0x00020000

+  EFI_SPECIFICATION_VERSION      = 0x0002000A

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC

+#

+

+[Sources.common]

+  BdsPlatform.c

+  PlatformData.c

+  BdsPlatform.h

+

+[Packages]

+  MdePkg/MdePkg.dec

+  MdeModulePkg/MdeModulePkg.dec

+  IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec

+

+[LibraryClasses]

+  BaseLib

+  MemoryAllocationLib

+  UefiBootServicesTableLib

+  BaseMemoryLib

+  DebugLib

+  PcdLib

+  GenericBdsLib

+  PciLib

+

+[Guids]

+  gEfiDefaultBmpLogoGuid

+

+[Pcd.common]

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPlatformBootTimeOut

+

+[Pcd.IA32, Pcd.X64]

+  gEfiMdePkgTokenSpaceGuid.PcdFSBClock

+

diff --git a/OvmfPkg/Library/PlatformBdsLib/PlatformData.c b/OvmfPkg/Library/PlatformBdsLib/PlatformData.c
new file mode 100644
index 0000000..74cc36b
--- /dev/null
+++ b/OvmfPkg/Library/PlatformBdsLib/PlatformData.c
@@ -0,0 +1,64 @@
+/** @file

+  Defined the platform specific device path which will be used by

+  platform Bbd to perform the platform policy connect.

+

+  Copyright (c) 2004 - 2008, Intel Corporation. <BR>

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#include "BdsPlatform.h"

+

+//

+// Predefined platform default time out value

+//

+UINT16                      gPlatformBootTimeOutDefault = 5;

+

+ACPI_HID_DEVICE_PATH       gPnpPs2KeyboardDeviceNode  = gPnpPs2Keyboard;

+ACPI_HID_DEVICE_PATH       gPnp16550ComPortDeviceNode = gPnp16550ComPort;

+UART_DEVICE_PATH           gUartDeviceNode            = gUart;

+VENDOR_DEVICE_PATH         gTerminalTypeDeviceNode    = gPcAnsiTerminal;

+

+//

+// Predefined platform root bridge

+//

+PLATFORM_ROOT_BRIDGE_DEVICE_PATH  gPlatformRootBridge0 = {

+  gPciRootBridge,

+  gEndEntire

+};

+

+EFI_DEVICE_PATH_PROTOCOL          *gPlatformRootBridges[] = {

+  (EFI_DEVICE_PATH_PROTOCOL *) &gPlatformRootBridge0,

+  NULL

+};

+

+//

+// Platform specific keyboard device path

+//

+

+//

+// Predefined platform default console device path

+//

+BDS_CONSOLE_CONNECT_ENTRY   gPlatformConsole[] = {

+  {

+    NULL,

+    0

+  }

+};

+

+//

+// Predefined platform specific driver option

+//

+EFI_DEVICE_PATH_PROTOCOL    *gPlatformDriverOption[] = { NULL };

+

+//

+// Predefined platform connect sequence

+//

+EFI_DEVICE_PATH_PROTOCOL    *gPlatformConnectSequence[] = { NULL };

+

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
new file mode 100644
index 0000000..a2ad0a4
--- /dev/null
+++ b/OvmfPkg/OvmfPkg.dec
@@ -0,0 +1,34 @@
+#/** @file

+#  EFI/Framework Open Virtual Machine Firmware (OVMF) platform

+#

+#  Copyright (c) 2006 - 2009, Intel Corporation

+#

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+# 

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+[Defines]

+  DEC_VERSION                    = 0x00010005

+  PACKAGE_NAME                   = OvmfPkg

+  PACKAGE_GUID                   = 2daf5f34-50e5-4b9d-b8e3-5562334d87e5

+  PACKAGE_VERSION                = 0.1

+

+[Guids.common]

+  gUefiOvmfPkgTokenSpaceGuid      = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}

+

+[PcdsFixedAtBuild.common]

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogBase|0x0|UINT32|0x0000100e

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageEventLogSize|0x0|UINT32|0x0000100f

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoveryBase|0x0|UINT32|0x00001010

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoverySize|0x0|UINT32|0x00001011

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x0|UINT32|0x00001012

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0|UINT32|0x00001013

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase|0x0|UINT32|0x00001014

+

+

diff --git a/OvmfPkg/OvmfPkg.fdf b/OvmfPkg/OvmfPkg.fdf
new file mode 100644
index 0000000..368978e
--- /dev/null
+++ b/OvmfPkg/OvmfPkg.fdf
@@ -0,0 +1,310 @@
+#/** @file

+#  Open Virtual Machine Firmware: FDF

+#

+#  Copyright (c) 2006 - 2009, Intel Corporation

+#

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+################################################################################

+#

+# FD Section

+# The [FD] Section is made up of the definition statements and a

+# description of what goes into  the Flash Device Image.  Each FD section

+# defines one flash "device" image.  A flash device image may be one of

+# the following: Removable media bootable image (like a boot floppy

+# image,) an Option ROM image (that would be "flashed" into an add-in

+# card,) a System "Flash"  image (that would be burned into a system's

+# flash) or an Update ("Capsule") image that will be used to update and

+# existing system flash.

+#

+################################################################################

+[FD.OVMF]

+BaseAddress   = 0xFFE00000     # The base address of the FLASH Device.

+Size          = 0x00200000     # The size in bytes of the FLASH Device

+ErasePolarity = 1

+BlockSize     = 0x10000

+NumBlocks     = 0x20

+

+################################################################################

+#

+# Following are lists of FD Region layout which correspond to the locations of different

+# images within the flash device.

+#

+# Regions must be defined in ascending order and may not overlap.

+#

+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by

+# the pipe "|" character, followed by the size of the region, also in hex with the leading

+# "0x" characters. Like:

+# Offset|Size

+# PcdOffsetCName|PcdSizeCName

+# RegionType <FV, DATA, or FILE>

+#

+################################################################################

+0x0|0x200000

+gEfiUnixPkgTokenSpaceGuid.PcdUnixFlashFvRecoveryBase|gEfiUnixPkgTokenSpaceGuid.PcdUnixFlashFvRecoverySize

+FV = MAINFV

+

+################################################################################

+#

+# FV Section

+#

+# [FV] section is used to define what components or modules are placed within a flash

+# device file.  This section also defines order the components and modules are positioned

+# within the image.  The [FV] section consists of define statements, set statements and

+# module statements.

+#

+################################################################################

+[FV.DXEFV]

+BlockSize          = 0x1000

+FvAlignment        = 16         #FV alignment and FV attributes setting.

+ERASE_POLARITY     = 1

+MEMORY_MAPPED      = TRUE

+STICKY_WRITE       = TRUE

+LOCK_CAP           = TRUE

+LOCK_STATUS        = TRUE

+WRITE_DISABLED_CAP = TRUE

+WRITE_ENABLED_CAP  = TRUE

+WRITE_STATUS       = TRUE

+WRITE_LOCK_CAP     = TRUE

+WRITE_LOCK_STATUS  = TRUE

+READ_DISABLED_CAP  = TRUE

+READ_ENABLED_CAP   = TRUE

+READ_STATUS        = TRUE

+READ_LOCK_CAP      = TRUE

+READ_LOCK_STATUS   = TRUE

+

+#

+# Files to be placed in DXEFV

+#

+# This firmware volume will have files placed in it uncompressed,

+# and then then entire firmware volume will be compressed in a

+# single compression operation in order to achieve better

+# overall compression.

+#

+

+APRIORI DXE {

+  INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf

+  INF  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf

+}

+

+#

+# DXE Phase modules

+#

+INF  MdeModulePkg/Core/Dxe/DxeMain.inf

+

+INF  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf

+INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf

+

+INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf

+INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

+INF  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf

+INF  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf

+INF  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf

+INF  UefiCpuPkg/CpuIoDxe/CpuIo.inf

+INF  UefiCpuPkg/CpuDxe/CpuDxe.inf

+INF  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf

+INF  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

+INF  PcAtChipsetPkg/KbcResetDxe/Reset.inf

+INF  MdeModulePkg/Universal/Metronome/Metronome.inf

+INF  PcAtChipsetPkg/PcRtc/RealTimeClock.inf

+

+INF  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf

+INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf

+INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

+INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

+INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf

+INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf

+INF  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf

+INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf

+INF  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf

+INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf

+INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf

+INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf

+INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf

+INF  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf

+INF  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf

+INF  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf

+INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf

+INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf

+

+INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf

+

+INF  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf

+

+INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+INF  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+INF  RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf

+

+INF  FatBinPkg/EnhancedFatDxe/Fat.inf

+

+INF  EdkShellBinPkg/FullShell/FullShell.inf

+

+FILE FREEFORM = 7BB28B99-61BB-11D5-9A5D-0090273FC14D {

+    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress

+      SECTION RAW = MdeModulePkg/Logo/Logo.bmp

+    }

+  }

+

+################################################################################

+

+[FV.MAINFV]

+FvAlignment        = 16

+ERASE_POLARITY     = 1

+MEMORY_MAPPED      = TRUE

+STICKY_WRITE       = TRUE

+LOCK_CAP           = TRUE

+LOCK_STATUS        = TRUE

+WRITE_DISABLED_CAP = TRUE

+WRITE_ENABLED_CAP  = TRUE

+WRITE_STATUS       = TRUE

+WRITE_LOCK_CAP     = TRUE

+WRITE_LOCK_STATUS  = TRUE

+READ_DISABLED_CAP  = TRUE

+READ_ENABLED_CAP   = TRUE

+READ_STATUS        = TRUE

+READ_LOCK_CAP      = TRUE

+READ_LOCK_STATUS   = TRUE

+

+#

+# Files to be placed in MAINFV

+#

+# This firmware volume will have all the files placed in it which

+# must not be compressed at the initial boot phase.  The only

+# exception to this is the compressed 'DXEFV'.

+#

+

+APRIORI PEI {

+  INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf

+}

+

+#

+#  SEC Phase modules

+#

+INF  OvmfPkg/Sec/SecMain.inf

+

+#

+#  PEI Phase modules

+#

+INF  MdeModulePkg/Core/Pei/PeiMain.inf

+INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf

+INF  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf

+INF  OvmfPkg/PlatformPei/PlatformPei.inf

+INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf

+

+#

+# This file contains the compressed 'DXEFV', which is compressed

+# in a single compression operation in order to achieve better

+# overall compression.

+#

+FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 {

+   SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress

+      SECTION FV_IMAGE = DXEFV

+   }

+ }

+

+INF  RuleOverride=RESET_VECTOR OvmfPkg/ResetVector/Bin/ResetVector.inf

+

+################################################################################

+#

+# Rules are use with the [FV] section's module INF type to define

+# how an FFS file is created for a given INF file. The following Rule are the default

+# rules for the different module type. User can add the customized rules to define the

+# content of the FFS file.

+#

+################################################################################

+

+[Rule.Common.PEI_CORE]

+  FILE PEI_CORE = $(NAMED_GUID) {

+    PE32     PE32           |.efi

+    UI       STRING ="$(MODULE_NAME)" Optional

+    VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.SEC]

+  FILE SEC = $(NAMED_GUID) {

+    PE32     PE32           |.efi

+    UI       STRING ="$(MODULE_NAME)" Optional

+    VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.PEIM]

+  FILE PEIM = $(NAMED_GUID) {

+     PEI_DEPEX PEI_DEPEX Optional        |.depex

+     PE32      PE32                      |.efi

+     UI       STRING="$(MODULE_NAME)" Optional

+     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.PEIM.TIANOCOMPRESSED]

+  FILE PEIM = $(NAMED_GUID) {

+    PEI_DEPEX PEI_DEPEX Optional         |.depex

+    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {

+      PE32      PE32                     |.efi

+      UI        STRING="$(MODULE_NAME)" Optional

+      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+    }

+  }

+

+[Rule.Common.DXE_CORE]

+  FILE DXE_CORE = $(NAMED_GUID) {

+    PE32     PE32           |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.UEFI_DRIVER]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX    DXE_DEPEX Optional      |.depex

+    PE32     PE32                    |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.DXE_DRIVER]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX    DXE_DEPEX Optional      |.depex

+    PE32     PE32                    |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.DXE_RUNTIME_DRIVER]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX    DXE_DEPEX Optional      |.depex

+    PE32     PE32                    |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.UEFI_APPLICATION]

+  FILE APPLICATION = $(NAMED_GUID) {

+    PE32     PE32                    |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.DXE_DRIVER.ACPITABLE]

+  FILE FREEFORM = $(NAMED_GUID) {

+    RAW ACPI               |.acpi

+    RAW ASL                |.aml

+  }

+

+[Rule.Common.SEC.RESET_VECTOR]

+  FILE RAW = $(NAMED_GUID) {

+    RAW RAW                |.raw

+  }

+

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
new file mode 100644
index 0000000..4259c22
--- /dev/null
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -0,0 +1,326 @@
+#/** @file

+#  EFI/Framework Open Virtual Machine Firmware (OVMF) platform

+#

+#  Copyright (c) 2006 - 2009, Intel Corporation

+#

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+################################################################################

+#

+# Defines Section - statements that will be processed to create a Makefile.

+#

+################################################################################

+[Defines]

+  PLATFORM_NAME                  = Ovmf

+  PLATFORM_GUID                  = 5a9e7754-d81b-49ea-85ad-69eaa7b1539b

+  PLATFORM_VERSION               = 0.1

+  DSC_ SPECIFICATION             = 0x00010005

+  OUTPUT_DIRECTORY               = Build/OvmfIa32

+  SUPPORTED_ARCHITECTURES        = IA32

+  BUILD_TARGETS                  = DEBUG|RELEASE

+  SKUID_IDENTIFIER               = DEFAULT

+  FLASH_DEFINITION               = OvmfPkg/OvmfPkg.fdf

+

+################################################################################

+#

+# SKU Identification section - list of all SKU IDs supported by this Platform.

+#

+################################################################################

+[SkuIds]

+  0|DEFAULT

+

+################################################################################

+#

+# Library Class section - list of all Library Classes needed by this Platform.

+#

+################################################################################

+[LibraryClasses.common]

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf

+  SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf

+  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf

+  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf

+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf

+  PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf

+  PciIncompatibleDeviceSupportLib|IntelFrameworkModulePkg/Library/PciIncompatibleDeviceSupportLib/PciIncompatibleDeviceSupportLib.inf

+  CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf

+  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf

+  UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf

+  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf

+  S3Lib|MdeModulePkg/Library/PeiS3LibNull/PeiS3LibNull.inf

+  RecoveryLib|MdeModulePkg/Library/PeiRecoveryLibNull/PeiRecoveryLibNull.inf

+  GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf

+  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf

+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf

+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf

+  PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf

+  PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf

+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf

+  OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+  SerialPortLib|PcAtChipsetPkg/Library/SerialIoLib/SerialIoLib.inf

+  MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf

+

+[LibraryClasses.common.SEC]

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf

+

+[LibraryClasses.common.PEI_CORE]

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf

+  PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf

+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf

+  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf

+  PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf

+  OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf

+

+[LibraryClasses.common.PEIM]

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf

+  PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf

+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf

+  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf

+  PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf

+  OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf

+  PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf

+  ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf

+

+[LibraryClasses.common.DXE_CORE]

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf

+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf

+  MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf

+

+[LibraryClasses.common.DXE_RUNTIME_DRIVER]

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf

+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/SmmRuntimeDxeReportStatusCodeLibFramework/SmmRuntimeDxeReportStatusCodeLibFramework.inf

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf

+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf

+  UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf

+  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf

+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+

+[LibraryClasses.common.UEFI_DRIVER]

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf

+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf

+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+  UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf

+

+[LibraryClasses.common.DXE_DRIVER]

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf

+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf

+  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf

+  IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf

+  UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf

+  DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf

+  PlatformBdsLib|OvmfPkg/Library/PlatformBdsLib/PlatformBdsLib.inf

+

+################################################################################

+#

+# Pcd Section - list of all EDK II PCD Entries defined by this Platform.

+#

+################################################################################

+[PcdsFeatureFlag.common]

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeUseHardSerial|TRUE

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE

+

+[PcdsFixedAtBuild.common]

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1

+  gEfiSioTokenSpaceGuid.PcdSerialRegisterBase|0x3F8

+  gEfiSioTokenSpaceGuid.PcdSerialLineControl|0x07

+  gEfiSioTokenSpaceGuid.PcdSerialBoudRate|115200

+

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x200000

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0x10000

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoveryBase|0xFFE00000

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoverySize|0x00200000

+

+  gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10

+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|6

+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv|32

+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x400

+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x8000

+  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x10000

+

+  gEfiEdkModulePkgTokenSpaceGuid.PcdDxePcdDatabaseTraverseEnabled|TRUE

+  gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0

+

+[PcdsFeatureFlag.common]

+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE

+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE

+

+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE

+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE

+  gOptionRomPkgTokenSpaceGuid.PcdSupportGop|TRUE

+  gOptionRomPkgTokenSpaceGuid.PcdSupportUga|FALSE

+

+[PcdsFixedAtBuild.common]

+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07

+  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F

+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F

+

+[PcdsDynamicDefault.common.DEFAULT]

+  gEfiMdePkgTokenSpaceGuid.PcdFSBClock|0

+

+################################################################################

+#

+# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform

+#

+################################################################################

+

+[PcdsDynamicDefault.common.DEFAULT]

+

+################################################################################

+#

+# Components Section - list of all EDK II Modules needed by this Platform.

+#

+################################################################################

+[Components.common]

+  #

+  # SEC Phase modules

+  #

+  OvmfPkg/Sec/SecMain.inf

+

+  #

+  # PEI Phase modules

+  #

+  MdeModulePkg/Core/Pei/PeiMain.inf

+  MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {

+    <LibraryClasses>

+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  }

+  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf

+  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {

+    <LibraryClasses>

+      NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf

+  }

+  OvmfPkg/PlatformPei/PlatformPei.inf

+

+  #

+  # DXE Phase modules

+  #

+  MdeModulePkg/Core/Dxe/DxeMain.inf {

+    <LibraryClasses>

+      NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf

+  }

+

+  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf

+  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf  {

+   <LibraryClasses>

+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  }

+

+  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf

+  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

+  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf

+  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf

+  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf

+  UefiCpuPkg/CpuIoDxe/CpuIo.inf

+  UefiCpuPkg/CpuDxe/CpuDxe.inf

+  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf

+  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf

+  IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

+  PcAtChipsetPkg/KbcResetDxe/Reset.inf

+  MdeModulePkg/Universal/Metronome/Metronome.inf {

+    <LibraryClasses>

+      TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  }

+

+  PcAtChipsetPkg/PcRtc/RealTimeClock.inf {

+    <LibraryClasses>

+      TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  }

+

+  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf  {

+    <LibraryClasses>

+      TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  }

+

+  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf

+  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf

+  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

+  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

+  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf

+  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf

+  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf

+  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf

+  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf

+  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf

+  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf

+  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf

+  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf

+  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf

+  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf

+  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf

+  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf

+  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf

+

+  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf

+

+  #

+  # ISA Support

+  #

+  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf

+  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf

+  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf

+  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf

+  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf

+

+  #

+  # ACPI Support

+  #

+  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+  OvmfPkg/AcpiTables/AcpiTables.inf

+

diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
new file mode 100644
index 0000000..809f49f
--- /dev/null
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -0,0 +1,327 @@
+#/** @file

+#  EFI/Framework Open Virtual Machine Firmware (OVMF) platform

+#

+#  Copyright (c) 2006 - 2009, Intel Corporation

+#

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+################################################################################

+#

+# Defines Section - statements that will be processed to create a Makefile.

+#

+################################################################################

+[Defines]

+  PLATFORM_NAME                  = Ovmf

+  PLATFORM_GUID                  = 5a9e7754-d81b-49ea-85ad-69eaa7b1539b

+  PLATFORM_VERSION               = 0.1

+  DSC_ SPECIFICATION             = 0x00010005

+  OUTPUT_DIRECTORY               = Build/Ovmf3264

+  SUPPORTED_ARCHITECTURES        = IA32|X64

+  BUILD_TARGETS                  = DEBUG|RELEASE

+  SKUID_IDENTIFIER               = DEFAULT

+  FLASH_DEFINITION               = OvmfPkg/OvmfPkgIa32X64.fdf

+

+################################################################################

+#

+# SKU Identification section - list of all SKU IDs supported by this Platform.

+#

+################################################################################

+[SkuIds]

+  0|DEFAULT

+

+################################################################################

+#

+# Library Class section - list of all Library Classes needed by this Platform.

+#

+################################################################################

+[LibraryClasses.common]

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf

+  SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf

+  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf

+  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf

+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf

+  PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf

+  PciIncompatibleDeviceSupportLib|IntelFrameworkModulePkg/Library/PciIncompatibleDeviceSupportLib/PciIncompatibleDeviceSupportLib.inf

+  CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf

+  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf

+  UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf

+  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf

+  S3Lib|MdeModulePkg/Library/PeiS3LibNull/PeiS3LibNull.inf

+  RecoveryLib|MdeModulePkg/Library/PeiRecoveryLibNull/PeiRecoveryLibNull.inf

+  GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf

+  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf

+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf

+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf

+  PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf

+  PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf

+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf

+  OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+  SerialPortLib|PcAtChipsetPkg/Library/SerialIoLib/SerialIoLib.inf

+  MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf

+

+[LibraryClasses.common.SEC]

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf

+

+[LibraryClasses.common.PEI_CORE]

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf

+  PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf

+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf

+  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf

+  PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf

+  OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf

+

+[LibraryClasses.common.PEIM]

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf

+  PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf

+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf

+  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf

+  PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf

+  OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf

+  PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf

+  ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf

+

+[LibraryClasses.common.DXE_CORE]

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf

+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf

+  MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf

+

+[LibraryClasses.common.DXE_RUNTIME_DRIVER]

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf

+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/SmmRuntimeDxeReportStatusCodeLibFramework/SmmRuntimeDxeReportStatusCodeLibFramework.inf

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf

+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf

+  UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf

+  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf

+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+

+[LibraryClasses.common.UEFI_DRIVER]

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf

+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf

+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+  UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf

+

+[LibraryClasses.common.DXE_DRIVER]

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf

+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf

+  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf

+  IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf

+  UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf

+  DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf

+  PlatformBdsLib|OvmfPkg/Library/PlatformBdsLib/PlatformBdsLib.inf

+

+################################################################################

+#

+# Pcd Section - list of all EDK II PCD Entries defined by this Platform.

+#

+################################################################################

+[PcdsFeatureFlag.common]

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeUseHardSerial|TRUE

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE

+

+[PcdsFixedAtBuild.common]

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1

+  gEfiSioTokenSpaceGuid.PcdSerialRegisterBase|0x3F8

+  gEfiSioTokenSpaceGuid.PcdSerialLineControl|0x07

+  gEfiSioTokenSpaceGuid.PcdSerialBoudRate|115200

+

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x200000

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0x10000

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoveryBase|0xFFE00000

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoverySize|0x00200000

+

+  gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10

+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|6

+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv|32

+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x400

+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x8000

+  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x10000

+

+  gEfiEdkModulePkgTokenSpaceGuid.PcdDxePcdDatabaseTraverseEnabled|TRUE

+  gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0

+

+[PcdsFeatureFlag.common]

+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE

+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE

+

+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE

+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE

+  gOptionRomPkgTokenSpaceGuid.PcdSupportGop|TRUE

+  gOptionRomPkgTokenSpaceGuid.PcdSupportUga|FALSE

+

+[PcdsFixedAtBuild.common]

+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07

+  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F

+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F

+

+[PcdsDynamicDefault.common.DEFAULT]

+  gEfiMdePkgTokenSpaceGuid.PcdFSBClock|0

+

+################################################################################

+#

+# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform

+#

+################################################################################

+

+[PcdsDynamicDefault.common.DEFAULT]

+

+################################################################################

+#

+# Components Section - list of all EDK II Modules needed by this Platform.

+#

+################################################################################

+[Components.IA32]

+  #

+  # SEC Phase modules

+  #

+  OvmfPkg/Sec/SecMain.inf

+

+  #

+  # PEI Phase modules

+  #

+  MdeModulePkg/Core/Pei/PeiMain.inf

+  MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {

+    <LibraryClasses>

+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  }

+  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf

+  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {

+    <LibraryClasses>

+      NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf

+  }

+  OvmfPkg/PlatformPei/PlatformPei.inf

+

+[Components.X64]

+  #

+  # DXE Phase modules

+  #

+  MdeModulePkg/Core/Dxe/DxeMain.inf {

+    <LibraryClasses>

+      NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf

+  }

+

+  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf

+  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf  {

+   <LibraryClasses>

+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  }

+

+  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf

+  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

+  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf

+  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf

+  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf

+  UefiCpuPkg/CpuIoDxe/CpuIo.inf

+  UefiCpuPkg/CpuDxe/CpuDxe.inf

+  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf

+  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf

+  IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

+  PcAtChipsetPkg/KbcResetDxe/Reset.inf

+  MdeModulePkg/Universal/Metronome/Metronome.inf {

+    <LibraryClasses>

+      TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  }

+

+  PcAtChipsetPkg/PcRtc/RealTimeClock.inf {

+    <LibraryClasses>

+      TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  }

+

+  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf  {

+    <LibraryClasses>

+      TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  }

+

+  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf

+  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf

+  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

+  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

+  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf

+  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf

+  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf

+  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf

+  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf

+  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf

+  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf

+  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf

+  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf

+  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf

+  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf

+  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf

+  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf

+  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf

+

+  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf

+

+  #

+  # ISA Support

+  #

+  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf

+  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf

+  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf

+  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf

+  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf

+

+  #

+  # ACPI Support

+  #

+  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+  OvmfPkg/AcpiTables/AcpiTables.inf

+

diff --git a/OvmfPkg/OvmfPkgIa32X64.fdf b/OvmfPkg/OvmfPkgIa32X64.fdf
new file mode 100644
index 0000000..239d214
--- /dev/null
+++ b/OvmfPkg/OvmfPkgIa32X64.fdf
@@ -0,0 +1,317 @@
+#/** @file

+#  Open Virtual Machine Firmware: FDF

+#

+#  Copyright (c) 2006 - 2009, Intel Corporation

+#

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+################################################################################

+#

+# FD Section

+# The [FD] Section is made up of the definition statements and a

+# description of what goes into  the Flash Device Image.  Each FD section

+# defines one flash "device" image.  A flash device image may be one of

+# the following: Removable media bootable image (like a boot floppy

+# image,) an Option ROM image (that would be "flashed" into an add-in

+# card,) a System "Flash"  image (that would be burned into a system's

+# flash) or an Update ("Capsule") image that will be used to update and

+# existing system flash.

+#

+################################################################################

+[FD.OVMF]

+BaseAddress   = 0xFFE00000     # The base address of the FLASH Device.

+Size          = 0x00200000     # The size in bytes of the FLASH Device

+ErasePolarity = 1

+BlockSize     = 0x10000

+NumBlocks     = 0x20

+

+################################################################################

+#

+# Following are lists of FD Region layout which correspond to the locations of different

+# images within the flash device.

+#

+# Regions must be defined in ascending order and may not overlap.

+#

+# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by

+# the pipe "|" character, followed by the size of the region, also in hex with the leading

+# "0x" characters. Like:

+# Offset|Size

+# PcdOffsetCName|PcdSizeCName

+# RegionType <FV, DATA, or FILE>

+#

+################################################################################

+0x0|0x200000

+gEfiUnixPkgTokenSpaceGuid.PcdUnixFlashFvRecoveryBase|gEfiUnixPkgTokenSpaceGuid.PcdUnixFlashFvRecoverySize

+FV = MAINFV

+

+################################################################################

+#

+# FV Section

+#

+# [FV] section is used to define what components or modules are placed within a flash

+# device file.  This section also defines order the components and modules are positioned

+# within the image.  The [FV] section consists of define statements, set statements and

+# module statements.

+#

+################################################################################

+[FV.DXEFV]

+BlockSize          = 0x1000

+FvAlignment        = 16         #FV alignment and FV attributes setting.

+ERASE_POLARITY     = 1

+MEMORY_MAPPED      = TRUE

+STICKY_WRITE       = TRUE

+LOCK_CAP           = TRUE

+LOCK_STATUS        = TRUE

+WRITE_DISABLED_CAP = TRUE

+WRITE_ENABLED_CAP  = TRUE

+WRITE_STATUS       = TRUE

+WRITE_LOCK_CAP     = TRUE

+WRITE_LOCK_STATUS  = TRUE

+READ_DISABLED_CAP  = TRUE

+READ_ENABLED_CAP   = TRUE

+READ_STATUS        = TRUE

+READ_LOCK_CAP      = TRUE

+READ_LOCK_STATUS   = TRUE

+

+#

+# Files to be placed in DXEFV

+#

+# This firmware volume will have files placed in it uncompressed,

+# and then then entire firmware volume will be compressed in a

+# single compression operation in order to achieve better

+# overall compression.

+#

+

+APRIORI DXE {

+  INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf

+  INF  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf

+}

+

+#

+# DXE Phase modules

+#

+INF  MdeModulePkg/Core/Dxe/DxeMain.inf

+

+INF  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf

+INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf

+

+INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf

+INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

+INF  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf

+INF  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf

+INF  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf

+INF  UefiCpuPkg/CpuIoDxe/CpuIo.inf

+INF  UefiCpuPkg/CpuDxe/CpuDxe.inf

+INF  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf

+INF  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

+INF  PcAtChipsetPkg/KbcResetDxe/Reset.inf

+INF  MdeModulePkg/Universal/Metronome/Metronome.inf

+INF  PcAtChipsetPkg/PcRtc/RealTimeClock.inf

+

+INF  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf

+INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf

+INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

+INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

+INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf

+INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf

+INF  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf

+INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf

+INF  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf

+INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf

+INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf

+INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf

+INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf

+INF  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf

+INF  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf

+INF  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf

+INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf

+INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf

+

+INF  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf

+

+INF  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf

+INF  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf

+

+INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+INF  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+INF  RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf

+

+FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {

+    SECTION PE32 = FatBinPkg/EnhancedFatDxe/X64/Fat.efi

+  }

+

+FILE APPLICATION = c57ad6b7-0515-40a8-9d21-551652854e37 {

+    SECTION PE32 = EdkShellBinPkg/FullShell/X64/Shell_full.efi

+  }

+

+FILE FREEFORM = 7BB28B99-61BB-11D5-9A5D-0090273FC14D {

+    SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress

+      SECTION RAW = MdeModulePkg/Logo/Logo.bmp

+    }

+  }

+

+################################################################################

+

+[FV.MAINFV]

+FvAlignment        = 16

+ERASE_POLARITY     = 1

+MEMORY_MAPPED      = TRUE

+STICKY_WRITE       = TRUE

+LOCK_CAP           = TRUE

+LOCK_STATUS        = TRUE

+WRITE_DISABLED_CAP = TRUE

+WRITE_ENABLED_CAP  = TRUE

+WRITE_STATUS       = TRUE

+WRITE_LOCK_CAP     = TRUE

+WRITE_LOCK_STATUS  = TRUE

+READ_DISABLED_CAP  = TRUE

+READ_ENABLED_CAP   = TRUE

+READ_STATUS        = TRUE

+READ_LOCK_CAP      = TRUE

+READ_LOCK_STATUS   = TRUE

+

+#

+# Files to be placed in MAINFV

+#

+# This firmware volume will have all the files placed in it which

+# must not be compressed at the initial boot phase.  The only

+# exception to this is the compressed 'DXEFV'.

+#

+

+APRIORI PEI {

+  INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf

+}

+

+#

+#  SEC Phase modules

+#

+INF  OvmfPkg/Sec/SecMain.inf

+

+#

+#  PEI Phase modules

+#

+INF  MdeModulePkg/Core/Pei/PeiMain.inf

+INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf

+INF  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf

+INF  OvmfPkg/PlatformPei/PlatformPei.inf

+INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf

+

+#

+# This file contains the compressed 'DXEFV', which is compressed

+# in a single compression operation in order to achieve better

+# overall compression.

+#

+FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 {

+   SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress

+      SECTION FV_IMAGE = DXEFV

+   }

+ }

+

+FILE RAW = 1BA0062E-C779-4582-8566-336AE8F78F09 {

+    SECTION RAW = OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw

+  }

+

+

+################################################################################

+#

+# Rules are use with the [FV] section's module INF type to define

+# how an FFS file is created for a given INF file. The following Rule are the default

+# rules for the different module type. User can add the customized rules to define the

+# content of the FFS file.

+#

+################################################################################

+

+[Rule.Common.PEI_CORE]

+  FILE PEI_CORE = $(NAMED_GUID) {

+    PE32     PE32           |.efi

+    UI       STRING ="$(MODULE_NAME)" Optional

+    VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.SEC]

+  FILE SEC = $(NAMED_GUID) {

+    PE32     PE32           |.efi

+    UI       STRING ="$(MODULE_NAME)" Optional

+    VERSION  STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.PEIM]

+  FILE PEIM = $(NAMED_GUID) {

+     PEI_DEPEX PEI_DEPEX Optional        |.depex

+     PE32      PE32                      |.efi

+     UI       STRING="$(MODULE_NAME)" Optional

+     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.PEIM.TIANOCOMPRESSED]

+  FILE PEIM = $(NAMED_GUID) {

+    PEI_DEPEX PEI_DEPEX Optional         |.depex

+    GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {

+      PE32      PE32                     |.efi

+      UI        STRING="$(MODULE_NAME)" Optional

+      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+    }

+  }

+

+[Rule.Common.DXE_CORE]

+  FILE DXE_CORE = $(NAMED_GUID) {

+    PE32     PE32           |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.UEFI_DRIVER]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX    DXE_DEPEX Optional      |.depex

+    PE32     PE32                    |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.DXE_DRIVER]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX    DXE_DEPEX Optional      |.depex

+    PE32     PE32                    |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.DXE_RUNTIME_DRIVER]

+  FILE DRIVER = $(NAMED_GUID) {

+    DXE_DEPEX    DXE_DEPEX Optional      |.depex

+    PE32     PE32                    |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.UEFI_APPLICATION]

+  FILE APPLICATION = $(NAMED_GUID) {

+    PE32     PE32                    |.efi

+    UI       STRING="$(MODULE_NAME)" Optional

+    VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)

+  }

+

+[Rule.Common.DXE_DRIVER.ACPITABLE]

+  FILE FREEFORM = $(NAMED_GUID) {

+    RAW ACPI               |.acpi

+    RAW ASL                |.aml

+  }

+

+[Rule.Common.SEC.RESET_VECTOR]

+  FILE RAW = $(NAMED_GUID) {

+    RAW RAW                |.raw

+  }

+

diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
new file mode 100644
index 0000000..866b3f9
--- /dev/null
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -0,0 +1,326 @@
+#/** @file

+#  EFI/Framework Open Virtual Machine Firmware (OVMF) platform

+#

+#  Copyright (c) 2006 - 2009, Intel Corporation

+#

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+################################################################################

+#

+# Defines Section - statements that will be processed to create a Makefile.

+#

+################################################################################

+[Defines]

+  PLATFORM_NAME                  = Ovmf

+  PLATFORM_GUID                  = 5a9e7754-d81b-49ea-85ad-69eaa7b1539b

+  PLATFORM_VERSION               = 0.1

+  DSC_ SPECIFICATION             = 0x00010005

+  OUTPUT_DIRECTORY               = Build/OvmfX64

+  SUPPORTED_ARCHITECTURES        = X64

+  BUILD_TARGETS                  = DEBUG|RELEASE

+  SKUID_IDENTIFIER               = DEFAULT

+  FLASH_DEFINITION               = OvmfPkg/OvmfPkg.fdf

+

+################################################################################

+#

+# SKU Identification section - list of all SKU IDs supported by this Platform.

+#

+################################################################################

+[SkuIds]

+  0|DEFAULT

+

+################################################################################

+#

+# Library Class section - list of all Library Classes needed by this Platform.

+#

+################################################################################

+[LibraryClasses.common]

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+  BaseLib|MdePkg/Library/BaseLib/BaseLib.inf

+  SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf

+  CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf

+  PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf

+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf

+  PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf

+  PciIncompatibleDeviceSupportLib|IntelFrameworkModulePkg/Library/PciIncompatibleDeviceSupportLib/PciIncompatibleDeviceSupportLib.inf

+  CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf

+  UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf

+  UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf

+  HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf

+  S3Lib|MdeModulePkg/Library/PeiS3LibNull/PeiS3LibNull.inf

+  RecoveryLib|MdeModulePkg/Library/PeiRecoveryLibNull/PeiRecoveryLibNull.inf

+  GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf

+  CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf

+  DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf

+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf

+  PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf

+  PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf

+  IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf

+  OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+  SerialPortLib|PcAtChipsetPkg/Library/SerialIoLib/SerialIoLib.inf

+  MtrrLib|UefiCpuPkg/Library/MtrrLib/MtrrLib.inf

+

+[LibraryClasses.common.SEC]

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf

+

+[LibraryClasses.common.PEI_CORE]

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf

+  PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf

+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf

+  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf

+  PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf

+  OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf

+

+[LibraryClasses.common.PEIM]

+  BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf

+  HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf

+  PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf

+  PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf

+  MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf

+  PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf

+  OemHookStatusCodeLib|IntelFrameworkModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf

+  PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf

+  PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf

+  ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf

+

+[LibraryClasses.common.DXE_CORE]

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf

+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf

+  MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf

+

+[LibraryClasses.common.DXE_RUNTIME_DRIVER]

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf

+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/SmmRuntimeDxeReportStatusCodeLibFramework/SmmRuntimeDxeReportStatusCodeLibFramework.inf

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf

+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf

+  UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf

+  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf

+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+

+[LibraryClasses.common.UEFI_DRIVER]

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+  DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf

+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf

+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+  UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf

+

+[LibraryClasses.common.DXE_DRIVER]

+  UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf

+  HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf

+  PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf

+  MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf

+  UefiLib|MdePkg/Library/UefiLib/UefiLib.inf

+  UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf

+  ReportStatusCodeLib|IntelFrameworkModulePkg/Library/DxeReportStatusCodeLibFramework/DxeReportStatusCodeLib.inf

+  DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf

+  UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf

+  DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf

+  UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf

+  DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf

+  NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf

+  IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf

+  UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf

+  DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf

+  PlatformBdsLib|OvmfPkg/Library/PlatformBdsLib/PlatformBdsLib.inf

+

+################################################################################

+#

+# Pcd Section - list of all EDK II PCD Entries defined by this Platform.

+#

+################################################################################

+[PcdsFeatureFlag.common]

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeUseHardSerial|TRUE

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE

+

+[PcdsFixedAtBuild.common]

+  gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1

+  gEfiSioTokenSpaceGuid.PcdSerialRegisterBase|0x3F8

+  gEfiSioTokenSpaceGuid.PcdSerialLineControl|0x07

+  gEfiSioTokenSpaceGuid.PcdSerialBoudRate|115200

+

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize|0x200000

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareBlockSize|0x10000

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoveryBase|0xFFE00000

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoverySize|0x00200000

+

+  gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10

+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxFvSupported|6

+  gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv|32

+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x400

+  gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x8000

+  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0x10000

+

+  gEfiEdkModulePkgTokenSpaceGuid.PcdDxePcdDatabaseTraverseEnabled|TRUE

+  gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0

+

+[PcdsFeatureFlag.common]

+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE

+  gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE

+

+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE

+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE

+  gOptionRomPkgTokenSpaceGuid.PcdSupportGop|TRUE

+  gOptionRomPkgTokenSpaceGuid.PcdSupportUga|FALSE

+

+[PcdsFixedAtBuild.common]

+  gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07

+  gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F

+  gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F

+

+[PcdsDynamicDefault.common.DEFAULT]

+  gEfiMdePkgTokenSpaceGuid.PcdFSBClock|0

+

+################################################################################

+#

+# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform

+#

+################################################################################

+

+[PcdsDynamicDefault.common.DEFAULT]

+

+################################################################################

+#

+# Components Section - list of all EDK II Modules needed by this Platform.

+#

+################################################################################

+[Components.common]

+  #

+  # SEC Phase modules

+  #

+  OvmfPkg/Sec/SecMain.inf

+

+  #

+  # PEI Phase modules

+  #

+  MdeModulePkg/Core/Pei/PeiMain.inf

+  MdeModulePkg/Universal/PCD/Pei/Pcd.inf  {

+    <LibraryClasses>

+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  }

+  IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf

+  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {

+    <LibraryClasses>

+      NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf

+  }

+  OvmfPkg/PlatformPei/PlatformPei.inf

+

+  #

+  # DXE Phase modules

+  #

+  MdeModulePkg/Core/Dxe/DxeMain.inf {

+    <LibraryClasses>

+      NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf

+  }

+

+  IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf

+  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf  {

+   <LibraryClasses>

+      PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf

+  }

+

+  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf

+  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf

+  IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf

+  MdeModulePkg/Universal/EbcDxe/EbcDxe.inf

+  PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf

+  UefiCpuPkg/CpuIoDxe/CpuIo.inf

+  UefiCpuPkg/CpuDxe/CpuDxe.inf

+  PcAtChipsetPkg/8254TimerDxe/8254Timer.inf

+  PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf

+  IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf

+  PcAtChipsetPkg/KbcResetDxe/Reset.inf

+  MdeModulePkg/Universal/Metronome/Metronome.inf {

+    <LibraryClasses>

+      TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  }

+

+  PcAtChipsetPkg/PcRtc/RealTimeClock.inf {

+    <LibraryClasses>

+      TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  }

+

+  IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf  {

+    <LibraryClasses>

+      TimerLib|OvmfPkg/Library/AcpiTimerLib/AcpiTimerLib.inf

+  }

+

+  MdeModulePkg/Universal/Variable/EmuRuntimeDxe/EmuVariableRuntimeDxe.inf

+  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf

+  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

+  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

+  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf

+  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf

+  MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf

+  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf

+  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf

+  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf

+  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf

+  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf

+  MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf

+  MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf

+  IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf

+  PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf

+  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf

+  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf

+

+  OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf

+

+  #

+  # ISA Support

+  #

+  PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf

+  IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf

+  IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf

+  IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf

+  IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf

+

+  #

+  # ACPI Support

+  #

+  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf

+  MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf

+  OvmfPkg/AcpiTables/AcpiTables.inf

+

diff --git a/OvmfPkg/PlatformPei/Cmos.c b/OvmfPkg/PlatformPei/Cmos.c
new file mode 100644
index 0000000..92df4a7
--- /dev/null
+++ b/OvmfPkg/PlatformPei/Cmos.c
@@ -0,0 +1,64 @@
+/** @file

+  PC/AT CMOS access routines

+

+  Copyright (c) 2006 - 2009, Intel Corporation<BR>

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+

+#include "Cmos.h"

+#include "Library/IoLib.h"

+

+/**

+  Reads 8-bits of CMOS data.

+

+  Reads the 8-bits of CMOS data at the location specified by Index.

+  The 8-bit read value is returned.

+

+  @param  Index  The CMOS location to read.

+

+  @return The value read.

+

+**/

+UINT8

+EFIAPI

+CmosRead8 (

+  IN      UINTN                     Index

+  )

+{

+  IoWrite8 (0x70, (UINT8) Index);

+  return IoRead8 (0x71);

+}

+

+

+/**

+  Writes 8-bits of CMOS data.

+

+  Writes 8-bits of CMOS data to the location specified by Index

+  with the value specified by Value and returns Value.

+

+  @param  Index  The CMOS location to write.

+  @param  Value  The value to write to CMOS.

+

+  @return The value written to CMOS.

+

+**/

+UINT8

+EFIAPI

+CmosWrite8 (

+  IN      UINTN                     Index,

+  IN      UINT8                     Value

+  )

+{

+  IoWrite8 (0x70, (UINT8) Index);

+  IoWrite8 (0x71, Value);

+  return Value;

+}

+

diff --git a/OvmfPkg/PlatformPei/Cmos.h b/OvmfPkg/PlatformPei/Cmos.h
new file mode 100644
index 0000000..71dd9fd
--- /dev/null
+++ b/OvmfPkg/PlatformPei/Cmos.h
@@ -0,0 +1,56 @@
+/** @file

+  PC/AT CMOS access routines

+

+  Copyright (c) 2006 - 2009, Intel Corporation<BR>

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#ifndef __CMOS_H__

+#define __CMOS_H__

+

+/**

+  Reads 8-bits of CMOS data.

+

+  Reads the 8-bits of CMOS data at the location specified by Index.

+  The 8-bit read value is returned.

+

+  @param  Index  The CMOS location to read.

+

+  @return The value read.

+

+**/

+UINT8

+EFIAPI

+CmosRead8 (

+  IN      UINTN                     Index

+  );

+

+/**

+  Writes 8-bits of CMOS data.

+

+  Writes 8-bits of CMOS data to the location specified by Index

+  with the value specified by Value and returns Value.

+

+  @param  Index  The CMOS location to write.

+  @param  Value  The value to write to CMOS.

+

+  @return The value written to CMOS.

+

+**/

+UINT8

+EFIAPI

+CmosWrite8 (

+  IN      UINTN                     Index,

+  IN      UINT8                     Value

+  );

+

+

+#endif

+

diff --git a/OvmfPkg/PlatformPei/Fv.c b/OvmfPkg/PlatformPei/Fv.c
new file mode 100644
index 0000000..7ae3523
--- /dev/null
+++ b/OvmfPkg/PlatformPei/Fv.c
@@ -0,0 +1,61 @@
+/** @file

+  Build FV related hobs for platform.

+

+  Copyright (c) 2006 - 2009, Intel Corporation

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#include "PiPei.h"

+#include <Library/DebugLib.h>

+#include <Library/PeimEntryPoint.h>

+#include <Library/HobLib.h>

+#include <Library/PeiServicesLib.h>

+#include <Library/PeiServicesTablePointerLib.h>

+#include <Library/PcdLib.h>

+

+

+/**

+  Perform a call-back into the SEC simulator to get address of the Firmware Hub

+

+  @param  FfsHeader     Ffs Header availible to every PEIM

+  @param  PeiServices   General purpose services available to every PEIM.

+

+  @retval EFI_SUCCESS   Platform PEI FVs were initialized successfully.

+

+**/

+EFI_STATUS

+PeiFvInitialization (

+  VOID

+  )

+{

+  EFI_PHYSICAL_ADDRESS FdBase;

+

+  DEBUG ((EFI_D_ERROR, "Platform PEI Firmware Volume Initialization\n"));

+

+  DEBUG (

+    (EFI_D_ERROR, "Firmware Volume HOB: 0x%x 0x%x\n",

+      PcdGet32 (PcdOvmfFlashFvRecoveryBase),

+      PcdGet32 (PcdOvmfFlashFvRecoverySize)

+      )

+    );

+

+  FdBase = PcdGet32 (PcdOvmfFlashFvRecoveryBase) - PcdGet32 (PcdVariableStoreSize) - PcdGet32 (PcdFlashNvStorageFtwSpareSize);

+  BuildFvHob (PcdGet32 (PcdOvmfFlashFvRecoveryBase), PcdGet32 (PcdOvmfFlashFvRecoverySize));

+

+  BuildResourceDescriptorHob (

+    EFI_RESOURCE_FIRMWARE_DEVICE,

+    (EFI_RESOURCE_ATTRIBUTE_PRESENT | EFI_RESOURCE_ATTRIBUTE_INITIALIZED | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE),

+    FdBase,

+    PcdGet32 (PcdOvmfFirmwareFdSize)

+    );

+

+  return EFI_SUCCESS;

+}

+

diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
new file mode 100644
index 0000000..daa83a0
--- /dev/null
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -0,0 +1,100 @@
+/**@file

+  Memory Detection for Virtual Machines.

+

+  Copyright (c) 2006 - 2009, Intel Corporation

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+Module Name:

+

+  MemDetect.c

+

+**/

+

+//

+// The package level header files this module uses

+//

+#include <PiPei.h>

+

+//

+// The Library classes this module consumes

+//

+#include <Library/DebugLib.h>

+#include <Library/HobLib.h>

+#include <Library/IoLib.h>

+#include <Library/PeimEntryPoint.h>

+#include <Library/ResourcePublicationLib.h>

+

+#include "Platform.h"

+#include "Cmos.h"

+

+STATIC

+UINTN

+GetSystemMemorySize (

+  )

+{

+  UINT8 Cmos0x34;

+  UINT8 Cmos0x35;

+

+  //

+  // CMOS 0x34/0x35 specifies the system memory above 16 MB.

+  // * CMOS(0x35) is the high byte

+  // * CMOS(0x34) is the low byte

+  // * The size is specified in 64kb chunks

+  // * Since this is memory above 16MB, the 16MB must be added

+  //   into the calculation to get the total memory size.

+  //

+

+  Cmos0x34 = (UINT8) CmosRead8 (0x34);

+  Cmos0x35 = (UINT8) CmosRead8 (0x35);

+

+  return ((((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);

+}

+

+

+/**

+  Peform Memory Detection

+

+  @return EFI_SUCCESS     The PEIM initialized successfully.

+

+**/

+EFI_STATUS

+MemDetect (

+  )

+{

+  EFI_STATUS                  Status;

+  EFI_PHYSICAL_ADDRESS        MemoryBase;

+  UINT64                      MemorySize;

+  UINT64                      TotalMemorySize;

+

+  DEBUG ((EFI_D_ERROR, "MemDetect called\n"));

+

+  //

+  // Determine total memory size available

+  //

+  TotalMemorySize = (UINT64)GetSystemMemorySize ();

+

+  MemoryBase = 0x800000;

+  MemorySize = TotalMemorySize - MemoryBase - 0x100000;

+

+  //

+  // Publish this memory to the PEI Core

+  //

+  Status = PublishSystemMemory(MemoryBase, MemorySize);

+  ASSERT_EFI_ERROR (Status);

+

+  //

+  // Create memory HOBs

+  //

+  AddMemoryBaseSizeHob (MemoryBase, MemorySize);

+  AddMemoryRangeHob (0x100000, 0x800000);

+  AddMemoryRangeHob (0x000000, 0x0A0000);

+

+  return EFI_SUCCESS;

+}

+

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
new file mode 100644
index 0000000..2219ebb
--- /dev/null
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -0,0 +1,188 @@
+/**@file

+  Platform PEI driver

+

+  Copyright (c) 2006 - 2009, Intel Corporation

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+//

+// The package level header files this module uses

+//

+#include <PiPei.h>

+

+//

+// The Library classes this module consumes

+//

+#include <Library/DebugLib.h>

+#include <Library/HobLib.h>

+#include <Library/IoLib.h>

+#include <Library/PciLib.h>

+#include <Library/PeimEntryPoint.h>

+#include <Library/ResourcePublicationLib.h>

+#include <Guid/MemoryTypeInformation.h>

+

+#include "Platform.h"

+

+EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {

+  { EfiACPIMemoryNVS,       0x004 },

+  { EfiACPIReclaimMemory,   0x01C },

+  { EfiRuntimeServicesData, 0x050 },

+  { EfiRuntimeServicesCode, 0x020 },

+  { EfiBootServicesCode,    0x0F0 },

+  { EfiBootServicesData,    0xA00 },

+  { EfiMaxMemoryType,       0x000 }

+};

+

+

+VOID

+AddIoMemoryBaseSizeHob (

+  EFI_PHYSICAL_ADDRESS        MemoryBase,

+  UINT64                      MemorySize

+  )

+{

+  STATIC EFI_RESOURCE_ATTRIBUTE_TYPE Attributes =

+    (

+      EFI_RESOURCE_ATTRIBUTE_PRESENT     |

+      EFI_RESOURCE_ATTRIBUTE_INITIALIZED |

+      EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |

+      EFI_RESOURCE_ATTRIBUTE_TESTED

+    );

+

+  BuildResourceDescriptorHob (

+    EFI_RESOURCE_MEMORY_MAPPED_IO,

+    Attributes,

+    MemoryBase,

+    MemorySize

+    );

+}

+

+

+VOID

+AddIoMemoryRangeHob (

+  EFI_PHYSICAL_ADDRESS        MemoryBase,

+  EFI_PHYSICAL_ADDRESS        MemoryLimit

+  )

+{

+  AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));

+}

+

+

+VOID

+AddMemoryBaseSizeHob (

+  EFI_PHYSICAL_ADDRESS        MemoryBase,

+  UINT64                      MemorySize

+  )

+{

+  STATIC EFI_RESOURCE_ATTRIBUTE_TYPE Attributes =

+    (

+      EFI_RESOURCE_ATTRIBUTE_PRESENT |

+      EFI_RESOURCE_ATTRIBUTE_INITIALIZED |

+      EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |

+      EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |

+      EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |

+      EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |

+      EFI_RESOURCE_ATTRIBUTE_TESTED

+    );

+

+  BuildResourceDescriptorHob (

+    EFI_RESOURCE_SYSTEM_MEMORY,

+    Attributes,

+    MemoryBase,

+    MemorySize

+    );

+}

+

+

+VOID

+AddMemoryRangeHob (

+  EFI_PHYSICAL_ADDRESS        MemoryBase,

+  EFI_PHYSICAL_ADDRESS        MemoryLimit

+  )

+{

+  AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));

+}

+

+

+VOID

+MemMapInitialization (

+  )

+{

+  //

+  // Create Memory Type Information HOB

+  //

+  BuildGuidDataHob (

+    &gEfiMemoryTypeInformationGuid,

+    mDefaultMemoryTypeInformation,

+    sizeof(mDefaultMemoryTypeInformation)

+    );

+

+  //

+  // Local APIC range

+  //

+  AddIoMemoryBaseSizeHob (0xFEC80000, 0x80000);

+

+  //

+  // I/O APIC range

+  //

+  AddIoMemoryBaseSizeHob (0xFEC00000, 0x80000);

+

+  //

+  // Video memory + Legacy BIOS region

+  //

+  AddMemoryRangeHob (0x0A0000, 0x0B0000);

+  AddIoMemoryRangeHob (0x0B0000, 0x100000);

+}

+

+

+VOID

+MiscInitialization (

+  )

+{

+  //

+  // Disable A20 Mask

+  //

+  IoWrite8 (0x92, (UINT8) (IoRead8 (0x92) | 0x02));

+

+  //

+  // Build the CPU hob with 36-bit addressing and 16-bits of IO space.

+  //

+  BuildCpuHob (36, 16);

+}

+

+

+/**

+  Perform Platform PEI initialization.

+

+  @param  FileHandle      Handle of the file being invoked.

+  @param  PeiServices     Describes the list of possible PEI Services.

+

+  @return EFI_SUCCESS     The PEIM initialized successfully.

+

+**/

+EFI_STATUS

+EFIAPI

+InitializePlatform (

+  IN       EFI_PEI_FILE_HANDLE  FileHandle,

+  IN CONST EFI_PEI_SERVICES     **PeiServices

+  )

+{

+  DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n"));

+

+  MemDetect ();

+

+  PeiFvInitialization ();

+

+  MemMapInitialization ();

+

+  MiscInitialization ();

+

+  return EFI_SUCCESS;

+}

+

diff --git a/OvmfPkg/PlatformPei/Platform.h b/OvmfPkg/PlatformPei/Platform.h
new file mode 100644
index 0000000..423dd84
--- /dev/null
+++ b/OvmfPkg/PlatformPei/Platform.h
@@ -0,0 +1,52 @@
+/** @file

+  Platform PEI module include file.

+

+  Copyright (c) 2006 - 2007, Intel Corporation

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+#ifndef _PLATFORM_PEI_H_INCLUDED_

+#define _PLATFORM_PEI_H_INCLUDED_

+

+VOID

+AddIoMemoryBaseSizeHob (

+  EFI_PHYSICAL_ADDRESS        MemoryBase,

+  UINT64                      MemorySize

+  );

+

+VOID

+AddIoMemoryRangeHob (

+  EFI_PHYSICAL_ADDRESS        MemoryBase,

+  EFI_PHYSICAL_ADDRESS        MemoryLimit

+  );

+

+VOID

+AddMemoryBaseSizeHob (

+  EFI_PHYSICAL_ADDRESS        MemoryBase,

+  UINT64                      MemorySize

+  );

+

+VOID

+AddMemoryRangeHob (

+  EFI_PHYSICAL_ADDRESS        MemoryBase,

+  EFI_PHYSICAL_ADDRESS        MemoryLimit

+  );

+

+EFI_STATUS

+MemDetect (

+  VOID

+  );

+

+EFI_STATUS

+PeiFvInitialization (

+  VOID

+  );

+

+#endif // _PLATFORM_PEI_H_INCLUDED_

diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
new file mode 100644
index 0000000..c52538f
--- /dev/null
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -0,0 +1,70 @@
+#/** @file

+#  Platform PEI driver

+#

+#  This module provides platform specific function to detect boot mode.

+#  Copyright (c) 2006 - 2009, Intel Corporation

+#

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = PlatformPei

+  FILE_GUID                      = 222c386d-5abc-4fb4-b124-fbb82488acf4

+  MODULE_TYPE                    = PEIM

+  VERSION_STRING                 = 1.0

+  EDK_RELEASE_VERSION            = 0x00020000

+  EFI_SPECIFICATION_VERSION      = 0x00020000

+

+  ENTRY_POINT                    = InitializePlatform

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC

+#

+

+[Sources.common]

+  Cmos.c

+  Fv.c

+  MemDetect.c

+  Platform.c

+

+[Packages]

+  MdePkg/MdePkg.dec

+  MdeModulePkg/MdeModulePkg.dec

+  OvmfPkg/OvmfPkg.dec

+

+[Guids]

+  gEfiMemoryTypeInformationGuid

+

+[LibraryClasses]

+  DebugLib

+  HobLib

+  IoLib

+  PeiResourcePublicationLib

+  PeiServicesTablePointerLib

+  PeimEntryPoint

+

+[FixedPcd.common]

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoveryBase

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoverySize

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashNvStorageVariableBase

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize

+

+[Pcd.common]

+  gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase

+

+[Depex]

+  TRUE

+

diff --git a/OvmfPkg/README b/OvmfPkg/README
new file mode 100644
index 0000000..3e76144
--- /dev/null
+++ b/OvmfPkg/README
@@ -0,0 +1,25 @@
+

+=== OVMF OVERVIEW ===

+

+The Open Virtual Machine Firmware (OVMF) project aims

+to support firmware for Virtual Machines using the edk2

+code base.  More information can be found at:

+

+  https://edk2.tianocore.org/OVMF.html

+

+=== STATUS ===

+

+Current status: Alpha

+

+Current capabilities:

+* IA32 and X64 architectures

+* QEMU (0.9.1 or later)

+  - Video, keyboard, IDE, CD-ROM, serial

+  - Runs UEFI shell

+* UEFI Linux has booted (but is not stable)

+

+=== FUTURE PLANS ===

+

+* Stabilize UEFI Linux boot

+* Test/Stabilize UEFI Self-Certification Tests (SCT) results

+

diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw
new file mode 100644
index 0000000..e68e75d
--- /dev/null
+++ b/OvmfPkg/ResetVector/Bin/ResetVector.ia32.raw
Binary files differ
diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.inf b/OvmfPkg/ResetVector/Bin/ResetVector.inf
new file mode 100644
index 0000000..a1a0e78
--- /dev/null
+++ b/OvmfPkg/ResetVector/Bin/ResetVector.inf
@@ -0,0 +1,35 @@
+#/** @file

+#  Reset Vector binary

+#

+#  Copyright (c) 2006 - 2009, Intel Corporation.

+#

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = ResetVector

+  FILE_GUID                      = 1BA0062E-C779-4582-8566-336AE8F78F09

+  MODULE_TYPE                    = SEC

+  VERSION_STRING                 = 1.1

+  EDK_RELEASE_VERSION            = 0x00020000

+  EFI_SPECIFICATION_VERSION      = 0x00020000

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+#  VALID_ARCHITECTURES           = IA32 X64

+#

+

+[Binaries.Ia32]

+  RAW|ResetVector.ia32.raw|*

+

+[Binaries.X64]

+  RAW|ResetVector.x64.raw|*

+

diff --git a/OvmfPkg/ResetVector/Bin/ResetVector.x64.raw b/OvmfPkg/ResetVector/Bin/ResetVector.x64.raw
new file mode 100644
index 0000000..94bb3e2
--- /dev/null
+++ b/OvmfPkg/ResetVector/Bin/ResetVector.x64.raw
Binary files differ
diff --git a/OvmfPkg/ResetVector/CommonMacros.inc b/OvmfPkg/ResetVector/CommonMacros.inc
new file mode 100644
index 0000000..19c6d07
--- /dev/null
+++ b/OvmfPkg/ResetVector/CommonMacros.inc
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   CommonMacros.inc

+;

+; Abstract:

+;

+;   Common macros used in the ResetVector VTF module.

+;

+;------------------------------------------------------------------------------

+

+%define ADDR16_OF(x) (0x10000 - fourGigabytes + x)

+%define ADDR_OF(x) (0x100000000 - fourGigabytes + x)

+

+%macro  callEdx 1

+    mov     edx, ADDR_OF(%%returnLabel)

+    jmp     %1

+%%returnLabel:

+%endmacro

+

+%macro  OneTimeCall 1

+    jmp     %1

+%1 %+ OneTimerCallReturn:

+%endmacro

+

+%macro  OneTimeCallRet 1

+    jmp     %1 %+ OneTimerCallReturn

+%endmacro

+

+StartOfResetVectorCode:

+

+%define ADDR_OF_START_OF_RESET_CODE ADDR_OF(StartOfResetVectorCode)

+

diff --git a/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm b/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm
new file mode 100644
index 0000000..d030c0b
--- /dev/null
+++ b/OvmfPkg/ResetVector/Ia16/16RealTo32Flat.asm
@@ -0,0 +1,151 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   16RealTo32Flat.asm

+;

+; Abstract:

+;

+;   Transition from 16 bit real mode into 32 bit flat protected mode

+;

+;------------------------------------------------------------------------------

+

+%define SEC_DEFAULT_CR0  0x40000023

+%define SEC_DEFAULT_CR4  0x640

+

+BITS    16

+

+to32BitFlat:

+

+    writeToSerialPort '1'

+    writeToSerialPort '6'

+    writeToSerialPort ' '

+

+    cli

+

+    mov     bx, 0xf000

+    mov     ds, bx

+

+    mov     bx, ADDR16_OF(gdtr)

+

+o32 lgdt    [bx]

+

+    mov     eax, SEC_DEFAULT_CR0

+    mov     cr0, eax

+

+;    mov     eax, cr0

+;    or      al, 1

+;    mov     cr0, eax

+

+    jmp     LINEAR_CODE_SEL:dword ADDR_OF(jumpTo32BitAndLandHere)

+BITS    32

+jumpTo32BitAndLandHere:

+

+    mov     eax, SEC_DEFAULT_CR4

+    mov     cr4, eax

+

+    writeToSerialPort '3'

+    writeToSerialPort '2'

+    writeToSerialPort ' '

+

+    mov ax, LINEAR_SEL

+    mov ds, ax

+    mov es, ax

+    mov fs, ax

+    mov gs, ax

+    mov ss, ax

+

+    jmp     TransitionFrom16RealTo32FlatComplete

+

+ALIGN   2

+

+gdtr:

+    dw      GDT_END - GDT_BASE - 1   ; GDT limit

+    dd      ADDR_OF(GDT_BASE)

+

+ALIGN   16

+

+GDT_BASE:

+; null descriptor

+NULL_SEL            equ $-GDT_BASE

+        dw 0            ; limit 15:0

+        dw 0            ; base 15:0

+        db 0            ; base 23:16

+        db 0            ; type

+        db 0            ; limit 19:16, flags

+        db 0            ; base 31:24

+

+; linear data segment descriptor

+LINEAR_SEL      equ $-GDT_BASE

+        dw 0FFFFh       ; limit 0xFFFFF

+        dw 0            ; base 0

+        db 0

+        db 092h         ; present, ring 0, data, expand-up, writable

+        db 0CFh                 ; page-granular, 32-bit

+        db 0

+

+; linear code segment descriptor

+LINEAR_CODE_SEL equ $-GDT_BASE

+        dw 0FFFFh       ; limit 0xFFFFF

+        dw 0            ; base 0

+        db 0

+        db 09Ah         ; present, ring 0, data, expand-up, writable

+        db 0CFh                 ; page-granular, 32-bit

+        db 0

+

+; system data segment descriptor

+SYS_DATA_SEL    equ $-GDT_BASE

+        dw 0FFFFh       ; limit 0xFFFFF

+        dw 0            ; base 0

+        db 0

+        db 092h         ; present, ring 0, data, expand-up, writable

+        db 0CFh                 ; page-granular, 32-bit

+        db 0

+

+; system code segment descriptor

+SYS_CODE_SEL    equ $-GDT_BASE

+        dw 0FFFFh       ; limit 0xFFFFF

+        dw 0            ; base 0

+        db 0

+        db 09Ah         ; present, ring 0, data, expand-up, writable

+        db 0CFh                 ; page-granular, 32-bit

+        db 0

+

+; spare segment descriptor

+LINEAR_CODE64_SEL  equ $-GDT_BASE

+    DW      -1                  ; LimitLow

+    DW      0                   ; BaseLow

+    DB      0                   ; BaseMid

+    DB      9bh

+    DB      0afh                ; LimitHigh   (CS.L=1, CS.D=0)

+    DB      0                   ; BaseHigh

+

+; spare segment descriptor

+SPARE4_SEL  equ $-GDT_BASE

+        dw 0            ; limit 0xFFFFF

+        dw 0            ; base 0

+        db 0

+        db 0            ; present, ring 0, data, expand-up, writable

+        db 0            ; page-granular, 32-bit

+        db 0

+

+; spare segment descriptor

+SPARE5_SEL  equ $-GDT_BASE

+        dw 0            ; limit 0xFFFFF

+        dw 0            ; base 0

+        db 0

+        db 0            ; present, ring 0, data, expand-up, writable

+        db 0            ; page-granular, 32-bit

+        db 0

+

+GDT_END:

+

diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm
new file mode 100644
index 0000000..75e259b
--- /dev/null
+++ b/OvmfPkg/ResetVector/Ia16/ResetVectorOldTools.asm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   Reset-16Bit-old-tools.asm

+;

+; Abstract:

+;

+;   First code exectuted by processor after resetting.

+;

+;------------------------------------------------------------------------------

+

+BITS	16

+

+earlyInit_Real16:

+

+	jmp	real16InitSerialPort

+real16SerialPortInitReturn:

+

+	jmp	to32BitFlat

+

+ALIGN	16

+

+;

+; Junk data.  Old GenFv tool will modify data here.

+;

+	DQ	0, 0

+

+;

+; Reset Vector

+;

+; This is where the processor will begin execution

+;

+	jmp	short earlyInit_Real16

+

+;

+; Junk data.  Old GenFv tool will modify data here.

+;

+ALIGN	16

+

+fourGigabytes:

+

diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
new file mode 100644
index 0000000..63aeaf6
--- /dev/null
+++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm
@@ -0,0 +1,54 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   Reset-16Bit-vft0.asm

+;

+; Abstract:

+;

+;   First code exectuted by processor after resetting.

+;

+;------------------------------------------------------------------------------

+

+BITS	16

+

+earlyInit_Real16:

+

+	jmp	real16InitSerialPort

+real16SerialPortInitReturn:

+

+	jmp	to32BitFlat

+

+ALIGN	16

+

+	DD	0, 0, 0

+

+;

+; The VTF signature

+;

+; VTF-0 means that the VTF (Volume Top File) code does not require

+; any fixups.

+;

+vtfSignature:

+	DB	'V', 'T', 'F', 0

+

+;

+; Reset Vector

+;

+; This is where the processor will begin execution

+;

+	jmp	short earlyInit_Real16

+

+ALIGN	16

+

+fourGigabytes:

+

diff --git a/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm b/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm
new file mode 100644
index 0000000..f0528d4
--- /dev/null
+++ b/OvmfPkg/ResetVector/Ia32/32FlatTo64Flat.asm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   32FlatTo64Flat.asm

+;

+; Abstract:

+;

+;   Transition from 32 bit flat protected mode into 64 bit flat protected mode

+;

+;------------------------------------------------------------------------------

+

+BITS    32

+

+Transition32FlatTo64Flat:

+

+    mov     eax, ((ADDR_OF_START_OF_RESET_CODE & ~0xfff) - 0x1000)

+    mov     cr3, eax

+

+    mov     eax, cr4

+    bts     eax, 5                      ; enable PAE

+    mov     cr4, eax                    

+

+    mov     ecx, 0xc0000080

+    rdmsr

+    bts     eax, 8                      ; set LME

+    wrmsr

+

+    mov     eax, cr0

+    bts     eax, 31                     ; set PG

+    mov     cr0, eax                    ; enable paging

+

+    jmp     LINEAR_CODE64_SEL:ADDR_OF(jumpTo64BitAndLandHere)

+BITS    64

+jumpTo64BitAndLandHere:

+

+    writeToSerialPort '6'

+    writeToSerialPort '4'

+    writeToSerialPort ' '

+

+    OneTimeCallRet Transition32FlatTo64Flat

+

diff --git a/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm b/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm
new file mode 100644
index 0000000..e6ca6e6
--- /dev/null
+++ b/OvmfPkg/ResetVector/Ia32/SearchForBfvBase.asm
@@ -0,0 +1,88 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   SearchForBfvBase.asm

+;

+; Abstract:

+;

+;   Search for the Boot FV Base Address

+;

+;------------------------------------------------------------------------------

+

+;#define EFI_FIRMWARE_FILE_SYSTEM2_GUID \

+;  { 0x8c8ce578, 0x8a3d, 0x4f1c, { 0x99, 0x35, 0x89, 0x61, 0x85, 0xc3, 0x2d, 0xd3 } }

+%define FFS_GUID_DWORD0 0x8c8ce578

+%define FFS_GUID_DWORD1 0x4f1c8a3d

+%define FFS_GUID_DWORD2 0x61893599

+%define FFS_GUID_DWORD3 0xd32dc385

+

+BITS    32

+

+;

+; Input:

+;   None

+;

+; Output:

+;   EBP - BFV Base Address

+;

+; Modified:

+;   EAX, EBX

+;

+Flat32SearchForBfvBase:

+

+    xor     eax, eax

+searchingForBfvHeaderLoop:

+    sub     eax, 0x1000

+    cmp     eax, 0xff800000

+    jb      searchedForBfvHeaderButNotFound

+

+    ;

+    ; Check FFS GUID

+    ;

+    cmp     dword [eax + 0x10], FFS_GUID_DWORD0

+    jne     searchingForBfvHeaderLoop

+    cmp     dword [eax + 0x14], FFS_GUID_DWORD1

+    jne     searchingForBfvHeaderLoop

+    cmp     dword [eax + 0x18], FFS_GUID_DWORD2

+    jne     searchingForBfvHeaderLoop

+    cmp     dword [eax + 0x1c], FFS_GUID_DWORD3

+    jne     searchingForBfvHeaderLoop

+

+    ;

+    ; Check FV Length

+    ;

+    cmp     dword [eax + 0x24], 0

+    jne     searchingForBfvHeaderLoop

+    mov     ebx, eax

+    add     ebx, dword [eax + 0x20]

+    jnz     searchingForBfvHeaderLoop

+

+    jmp     searchedForBfvHeaderAndItWasFound

+

+searchedForBfvHeaderButNotFound:

+    writeToSerialPort '!'

+    xor     eax, eax

+

+searchedForBfvHeaderAndItWasFound:

+    mov     ebp, eax

+

+    writeToSerialPort 'B'

+    writeToSerialPort 'F'

+    writeToSerialPort 'V'

+    writeToSerialPort ' '

+

+    or      ebp, ebp

+    jz      $

+

+    OneTimeCallRet Flat32SearchForBfvBase

+

diff --git a/OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm b/OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm
new file mode 100644
index 0000000..b4f734f
--- /dev/null
+++ b/OvmfPkg/ResetVector/Ia32/SearchForSecAndPeiEntries.asm
@@ -0,0 +1,199 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   SearchForSecAndPeiEntry.asm

+;

+; Abstract:

+;

+;   Search for the SEC Core and PEI Core entry points

+;

+;------------------------------------------------------------------------------

+

+BITS    32

+

+%define EFI_FV_FILETYPE_SECURITY_CORE         0x03

+%define EFI_FV_FILETYPE_PEI_CORE              0x04

+

+;

+; Input:

+;   EBP - BFV Base Address

+;

+; Output:

+;   ESI - SEC Core Entry Point Address (or 0 if not found)

+;   EDI - PEI Core Entry Point Address (or 0 if not found)

+;

+; Modified:

+;   EAX, EBX, ECX

+;

+Flat32SearchForSecAndPeiEntries:

+

+    ;

+    ; Initialize EBP and ESI to 0

+    ;

+    xor     ebx, ebx

+    mov     esi, ebx

+    mov     edi, ebx

+

+    ;

+    ; Pass over the BFV header

+    ;

+    mov     eax, ebp

+    mov     bx, [ebp + 0x30]

+    add     eax, ebx

+    jc      doneSeachingForSecAndPeiEntries

+

+    jmp     searchingForFfsFileHeaderLoop

+

+moveForwardWhileSearchingForFfsFileHeaderLoop:

+    ;

+    ; Make forward progress in the search

+    ;

+    inc     eax

+    jc      doneSeachingForSecAndPeiEntries

+

+searchingForFfsFileHeaderLoop:

+    test    eax, eax

+    jz      doneSeachingForSecAndPeiEntries

+

+    ;

+    ; Ensure 8 byte alignment

+    ;

+    add     eax, 7

+    jc      doneSeachingForSecAndPeiEntries

+    and     al, 0xf8

+

+    ;

+    ; Look to see if there is an FFS file at eax

+    ;

+    mov     bl, [eax + 0x17]

+    test    bl, 0x20

+    jz      moveForwardWhileSearchingForFfsFileHeaderLoop

+    mov     ecx, [eax + 0x14]

+    and     ecx, 0x00ffffff

+    or      ecx, ecx

+    jz      moveForwardWhileSearchingForFfsFileHeaderLoop

+;    jmp     $

+    add     ecx, eax

+    jz      jumpSinceWeFoundTheLastFfsFile

+    jc      moveForwardWhileSearchingForFfsFileHeaderLoop

+jumpSinceWeFoundTheLastFfsFile:

+

+    ;

+    ; There seems to be a valid file at eax

+    ;

+    mov     bl, [eax + 0x12] ; BL - File Type

+    cmp     bl, EFI_FV_FILETYPE_PEI_CORE

+    je      fileTypeIsPeiCore

+    cmp     bl, EFI_FV_FILETYPE_SECURITY_CORE

+    jne     readyToTryFfsFileAtEcx

+

+fileTypeIsSecCore:

+    callEdx GetEntryPointOfFfsFileReturnEdx

+    test    eax, eax

+    jz      readyToTryFfsFileAtEcx

+

+    mov     esi, eax

+    jmp     readyToTryFfsFileAtEcx

+

+fileTypeIsPeiCore:

+    callEdx GetEntryPointOfFfsFileReturnEdx

+    test    eax, eax

+    jz      readyToTryFfsFileAtEcx

+

+    mov     edi, eax

+

+readyToTryFfsFileAtEcx:

+    mov     eax, ecx

+    jmp     searchingForFfsFileHeaderLoop

+

+doneSeachingForSecAndPeiEntries:

+

+    test    esi, esi

+    jnz     secCoreEntryPointWasFound

+    writeToSerialPort '!'

+secCoreEntryPointWasFound:

+    writeToSerialPort 'S'

+    writeToSerialPort 'E'

+    writeToSerialPort 'C'

+    writeToSerialPort ' '

+

+    test    edi, edi

+    jnz     peiCoreEntryPointWasFound

+    writeToSerialPort '!'

+peiCoreEntryPointWasFound:

+    writeToSerialPort 'P'

+    writeToSerialPort 'E'

+    writeToSerialPort 'I'

+    writeToSerialPort ' '

+

+    OneTimeCallRet Flat32SearchForSecAndPeiEntries

+

+

+%define EFI_SECTION_PE32                  0x10

+

+;

+; Input:

+;   EAX - Start of FFS file

+;

+; Output:

+;   EAX - Entry point of PE32 (or 0 if not found)

+;

+; Modified:

+;   EBX

+;

+GetEntryPointOfFfsFileReturnEdx:

+    test    eax, eax

+    jz      getEntryPointOfFfsFileErrorReturn

+

+    cmp     byte [eax + 0x1b], EFI_SECTION_PE32

+    jne     getEntryPointOfFfsFileErrorReturn

+

+    add     eax, 0x1c       ; EAX = Start of PE32 image

+

+    mov     ebx, eax

+    cmp     word [eax], 'MZ'

+    jne     thereIsNotAnMzSignature

+    movzx   ebx, word [eax + 0x3c]

+    add     ebx, eax

+thereIsNotAnMzSignature:

+

+    ; if (Hdr.Te->Signature == EFI_TE_IMAGE_HEADER_SIGNATURE)

+    cmp     word [ebx], 'VZ'

+    jne     thereIsNoVzSignature

+    ; *EntryPoint = (VOID *)((UINTN)Pe32Data +

+    ;   (UINTN)(Hdr.Te->AddressOfEntryPoint & 0x0ffffffff) +

+    ;   sizeof(EFI_TE_IMAGE_HEADER) - Hdr.Te->StrippedSize);

+    add     eax, [ebx + 0x8]

+    add     eax, 0x28

+    movzx   ebx, word [ebx + 0x6]

+    sub     eax, ebx

+    jmp     getEntryPointOfFfsFileReturn

+

+thereIsNoVzSignature:

+

+    ; if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE)

+    cmp     dword [ebx], `PE\x00\x00`

+    jne     getEntryPointOfFfsFileErrorReturn

+

+    ; *EntryPoint = (VOID *)((UINTN)Pe32Data +

+    ;   (UINTN)(Hdr.Pe32->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff));

+    add     eax, [ebx + 0x4 + 0x14 + 0x10]

+    jmp     getEntryPointOfFfsFileReturn

+

+getEntryPointOfFfsFileErrorReturn:

+    mov     eax, 0

+

+getEntryPointOfFfsFileReturn:

+    jmp     edx

+

+

diff --git a/OvmfPkg/ResetVector/JumpToSec.asm b/OvmfPkg/ResetVector/JumpToSec.asm
new file mode 100644
index 0000000..d7442f0
--- /dev/null
+++ b/OvmfPkg/ResetVector/JumpToSec.asm
@@ -0,0 +1,63 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   JumpToSec.asm

+;

+; Abstract:

+;

+;   Jump from the reset vector binary to SEC

+;

+;------------------------------------------------------------------------------

+

+BITS    32

+

+TransitionFrom16RealTo32FlatComplete:

+

+    OneTimeCall Flat32SearchForBfvBase

+

+    OneTimeCall Flat32SearchForSecAndPeiEntries

+

+    ;

+    ; ESI - SEC Core entry point

+    ; EDI - PEI Core entry point

+    ; EBP - Start of BFV

+    ;

+    ; Jump to SEC Core entry point

+    ;

+

+%ifdef ARCH_IA32

+

+    jmp     esi

+

+%else

+

+    OneTimeCall Transition32FlatTo64Flat

+BITS    64

+

+    mov     rax, 0x00000000ffffffff

+    and     rsi, rax

+    and     rdi, rax

+    and     rbp, rax

+    ;

+    ; RSI - SEC Core entry point

+    ; RDI - PEI Core entry point

+    ; RBP - Start of BFV

+    ;

+    ; Jump to SEC Core entry point

+    ;

+

+    jmp     rsi

+

+%endif

+

+

diff --git a/OvmfPkg/ResetVector/Makefile b/OvmfPkg/ResetVector/Makefile
new file mode 100644
index 0000000..a4c3f78
--- /dev/null
+++ b/OvmfPkg/ResetVector/Makefile
@@ -0,0 +1,42 @@
+## @file
+#  Makefile to create FFS Raw sections for VTF images.
+#
+#  Copyright (c) 2008, Intel Corporation
+#
+#  All rights reserved. This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+TARGETS = Bin/ResetVector.ia32.raw Bin/ResetVector.x64.raw
+ASM = nasm
+
+COMMON_DEPS = \
+  Ia16/16RealTo32Flat.asm \
+  Ia32/32FlatTo64Flat.asm \
+  JumpToSec.asm \
+  Ia16/ResetVectorVtf0.asm \
+  Ia32/SearchForBfvBase.asm \
+  Ia32/SearchForSecAndPeiEntries.asm \
+  SerialDebug.asm \
+  Makefile \
+  Tools/FixupForRawSection.py
+
+.PHONY: all
+all: $(TARGETS)
+
+Bin/ResetVector.ia32.raw: $(COMMON_DEPS) ResetVectorCode.asm
+	nasm -D ARCH_IA32 -o $@ ResetVectorCode.asm
+	python Tools/FixupForRawSection.py $@
+
+Bin/ResetVector.x64.raw: $(COMMON_DEPS) ResetVectorCode.asm
+	nasm -D ARCH_X64 -o $@ ResetVectorCode.asm
+	python Tools/FixupForRawSection.py $@
+
+clean:
+	-rm $(TARGETS)
+
diff --git a/OvmfPkg/ResetVector/ResetVectorCode.asm b/OvmfPkg/ResetVector/ResetVectorCode.asm
new file mode 100644
index 0000000..4339505
--- /dev/null
+++ b/OvmfPkg/ResetVector/ResetVectorCode.asm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   ResetVectorCode.asm

+;

+; Abstract:

+;

+;   Create code for VTF raw section.

+;

+;------------------------------------------------------------------------------

+

+%ifdef ARCH_IA32

+  %ifdef ARCH_X64

+    %error "Only one of ARCH_IA32 or ARCH_X64 can be defined."

+  %endif

+%elifdef ARCH_X64

+%else

+  %error "Either ARCH_IA32 or ARCH_X64 must be defined."

+%endif

+

+%include "CommonMacros.inc"

+%include "SerialDebug.asm"

+%include "Ia32/SearchForBfvBase.asm"

+%include "Ia32/SearchForSecAndPeiEntries.asm"

+%include "JumpToSec.asm"

+%include "Ia16/16RealTo32Flat.asm"

+

+%ifdef ARCH_X64

+%include "Ia32/32FlatTo64Flat.asm"

+%endif

+

+%include "Ia16/ResetVectorVtf0.asm"

+

diff --git a/OvmfPkg/ResetVector/SerialDebug.asm b/OvmfPkg/ResetVector/SerialDebug.asm
new file mode 100644
index 0000000..2959fa5
--- /dev/null
+++ b/OvmfPkg/ResetVector/SerialDebug.asm
@@ -0,0 +1,114 @@
+;------------------------------------------------------------------------------

+;

+; Copyright (c) 2008, Intel Corporation

+; All rights reserved. This program and the accompanying materials

+; are licensed and made available under the terms and conditions of the BSD License

+; which accompanies this distribution.  The full text of the license may be found at

+; http://opensource.org/licenses/bsd-license.php

+;

+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;

+; Module Name:

+;

+;   SerialDebug.asm

+;

+; Abstract:

+;

+;   Serial port support macros

+;

+;------------------------------------------------------------------------------

+

+BITS    16

+

+;//---------------------------------------------

+;// UART Register Offsets

+;//---------------------------------------------

+%define BAUD_LOW_OFFSET         0x00

+%define BAUD_HIGH_OFFSET        0x01

+%define IER_OFFSET              0x01

+%define LCR_SHADOW_OFFSET       0x01

+%define FCR_SHADOW_OFFSET       0x02

+%define IR_CONTROL_OFFSET       0x02

+%define FCR_OFFSET              0x02

+%define EIR_OFFSET              0x02

+%define BSR_OFFSET              0x03

+%define LCR_OFFSET              0x03

+%define MCR_OFFSET              0x04

+%define LSR_OFFSET              0x05

+%define MSR_OFFSET              0x06

+

+;//---------------------------------------------

+;// UART Register Bit Defines

+;//---------------------------------------------

+%define LSR_TXRDY               0x20

+%define LSR_RXDA                0x01

+%define DLAB                    0x01

+

+; UINT16  gComBase = 0x3f8;

+; UINTN   gBps = 115200;

+; UINT8   gData = 8;

+; UINT8   gStop = 1;

+; UINT8   gParity = 0;

+; UINT8   gBreakSet = 0;

+

+%define DEFAULT_COM_BASE 0x3f8

+%define DEFAULT_BPS 115200

+%define DEFAULT_DATA 8

+%define DEFAULT_STOP 1

+%define DEFAULT_PARITY 0

+%define DEFAULT_BREAK_SET 0

+

+%define SERIAL_DEFAULT_LCR ( \

+     (DEFAULT_BREAK_SET << 6) | \

+     (DEFAULT_PARITY << 3) | \

+     (DEFAULT_STOP << 2) | \

+     (DEFAULT_DATA - 5) \

+    )

+

+%define SERIAL_PORT_IO_BASE_ADDRESS DEFAULT_COM_BASE

+

+%macro  inFromSerialPort 1

+    mov     dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)

+    in      al, dx

+%endmacro

+

+%macro  waitForSerialTxReady 0

+

+%%waitingForTx:

+    inFromSerialPort LSR_OFFSET

+    test    al, LSR_TXRDY

+    jz      %%waitingForTx

+

+%endmacro

+

+%macro  outToSerialPort 2

+    mov     dx, (SERIAL_PORT_IO_BASE_ADDRESS + %1)

+    mov     al, %2

+    out     dx, al

+%endmacro

+

+%macro  writeToSerialPort 1

+    waitForSerialTxReady

+    outToSerialPort 0, %1

+%endmacro

+

+real16InitSerialPort:

+    ;

+    ; Set communications format

+    ;

+    outToSerialPort LCR_OFFSET, ((DLAB << 7) | SERIAL_DEFAULT_LCR)

+

+    ;

+    ; Configure baud rate

+    ;

+    outToSerialPort BAUD_HIGH_OFFSET, ((115200 / DEFAULT_BPS) >> 8)

+    outToSerialPort BAUD_LOW_OFFSET, ((115200 / DEFAULT_BPS) & 0xff)

+

+    ;

+    ; Switch back to bank 0

+    ;

+    outToSerialPort LCR_OFFSET, SERIAL_DEFAULT_LCR

+

+    jmp     real16SerialPortInitReturn

+

diff --git a/OvmfPkg/ResetVector/Tools/FixupForRawSection.py b/OvmfPkg/ResetVector/Tools/FixupForRawSection.py
new file mode 100644
index 0000000..a4c3799
--- /dev/null
+++ b/OvmfPkg/ResetVector/Tools/FixupForRawSection.py
@@ -0,0 +1,110 @@
+## @file
+#  Apply fixup to VTF binary image for FFS Raw section
+#
+#  Copyright (c) 2008, Intel Corporation
+#
+#  All rights reserved. This program and the accompanying materials
+#  are licensed and made available under the terms and conditions of the BSD License
+#  which accompanies this distribution.  The full text of the license may be found at
+#  http://opensource.org/licenses/bsd-license.php
+#
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+
+import sys
+
+filename = sys.argv[1]
+
+if filename.lower().find('ia32') >= 0:
+    d = open(sys.argv[1], 'rb').read()
+    c = ((len(d) + 4 + 7) & ~7) - 4
+    if c > len(d):
+        c -= len(d)
+        f = open(sys.argv[1], 'wb')
+        f.write('\x90' * c)
+        f.write(d)
+        f.close()
+else:
+    from struct import pack
+
+    PAGE_PRESENT             =     0x01
+    PAGE_READ_WRITE          =     0x02
+    PAGE_USER_SUPERVISOR     =     0x04
+    PAGE_WRITE_THROUGH       =     0x08
+    PAGE_CACHE_DISABLE       =    0x010
+    PAGE_ACCESSED            =    0x020
+    PAGE_DIRTY               =    0x040
+    PAGE_PAT                 =    0x080
+    PAGE_GLOBAL              =   0x0100
+    PAGE_2M_MBO              =    0x080
+    PAGE_2M_PAT              =  0x01000
+
+    def NopAlign4k(s):
+        c = ((len(s) + 0xfff) & ~0xfff) - len(s)
+        return ('\x90' * c) + s
+
+    def PageDirectoryEntries4GbOf2MbPages(baseAddress):
+
+        s = ''
+        for i in range(0x800):
+            i = (
+                    baseAddress + long(i << 21) +
+                    PAGE_2M_MBO +
+                    PAGE_CACHE_DISABLE +
+                    PAGE_ACCESSED +
+                    PAGE_DIRTY +
+                    PAGE_READ_WRITE +
+                    PAGE_PRESENT
+                )
+            s += pack('Q', i)
+        return s
+
+    def PageDirectoryPointerTable4GbOf2MbPages(pdeBase):
+        s = ''
+        for i in range(0x200):
+            i = (
+                    pdeBase +
+                    (min(i, 3) << 12) +
+                    PAGE_CACHE_DISABLE +
+                    PAGE_ACCESSED +
+                    PAGE_READ_WRITE +
+                    PAGE_PRESENT
+                )
+            s += pack('Q', i)
+        return s
+
+    def PageMapLevel4Table4GbOf2MbPages(pdptBase):
+        s = ''
+        for i in range(0x200):
+            i = (
+                    pdptBase +
+                    (min(i, 0) << 12) +
+                    PAGE_CACHE_DISABLE +
+                    PAGE_ACCESSED +
+                    PAGE_READ_WRITE +
+                    PAGE_PRESENT
+                )
+            s += pack('Q', i)
+        return s
+
+    def First4GbPageEntries(topAddress):
+        PDE = PageDirectoryEntries4GbOf2MbPages(0L)
+        pml4tBase = topAddress - 0x1000
+        pdptBase = pml4tBase - 0x1000
+        pdeBase = pdptBase - len(PDE)
+        PDPT = PageDirectoryPointerTable4GbOf2MbPages(pdeBase)
+        PML4T = PageMapLevel4Table4GbOf2MbPages(pdptBase)
+        return PDE + PDPT + PML4T
+
+    def AlignAndAddPageTables():
+        d = open(sys.argv[1], 'rb').read()
+        code = NopAlign4k(d)
+        topAddress = 0x100000000 - len(code)
+        d = ('\x90' * 4) + First4GbPageEntries(topAddress) + code
+        f = open(sys.argv[1], 'wb')
+        f.write(d)
+        f.close()
+
+    AlignAndAddPageTables()
+
diff --git a/OvmfPkg/Sec/Ia32/SecEntry.S b/OvmfPkg/Sec/Ia32/SecEntry.S
new file mode 100644
index 0000000..9fefebc
--- /dev/null
+++ b/OvmfPkg/Sec/Ia32/SecEntry.S
@@ -0,0 +1,63 @@
+#
+# ConvertAsm.py: Automatically generated from SecEntry.asm
+#
+#      TITLE   SecEntry.asm
+
+#------------------------------------------------------------------------------
+#*
+#*   Copyright 2006 - 2009, Intel Corporation
+#*   All rights reserved. This program and the accompanying materials
+#*   are licensed and made available under the terms and conditions of the BSD License
+#*   which accompanies this distribution.  The full text of the license may be found at
+#*   http://opensource.org/licenses/bsd-license.php
+#*
+#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#*
+#*    CpuAsm.asm
+#*
+#*   Abstract:
+#*
+#------------------------------------------------------------------------------
+
+
+#include "SecMain.h"
+
+#EXTERN ASM_PFX(SecCoreStartupWithStack)
+
+#
+#  SecCore Entry Point
+#
+#  Processor is in flat protected mode
+#
+#  @param  ESI  Pointer to SEC Core Entry Point (this function)
+#  @param  EDI  Pointer to PEI Core Entry Point
+#  @param  EBP  Pointer to the start of the Boot Firmware Volume
+#
+#  @return None
+#
+#
+.intel_syntax
+ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+
+    #
+    # Load temporary stack top at very low memory.  The C code
+    # can reload to a better address.
+    #
+    mov     eax, INITIAL_TOP_OF_STACK
+    mov     esp, eax
+    nop
+
+    #
+    # Call into C code
+    #
+    push    eax
+    push    edi
+    push    esi
+    push    ebp
+    call    ASM_PFX(SecCoreStartupWithStack)
+
+
+#END
+
diff --git a/OvmfPkg/Sec/Ia32/SecEntry.asm b/OvmfPkg/Sec/Ia32/SecEntry.asm
new file mode 100644
index 0000000..48b97a4
--- /dev/null
+++ b/OvmfPkg/Sec/Ia32/SecEntry.asm
@@ -0,0 +1,60 @@
+      TITLE   SecEntry.asm

+;------------------------------------------------------------------------------

+;*

+;*   Copyright 2006 - 2009, Intel Corporation

+;*   All rights reserved. This program and the accompanying materials

+;*   are licensed and made available under the terms and conditions of the BSD License

+;*   which accompanies this distribution.  The full text of the license may be found at

+;*   http://opensource.org/licenses/bsd-license.php

+;*

+;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;*

+;*    CpuAsm.asm

+;*

+;*   Abstract:

+;*

+;------------------------------------------------------------------------------

+

+#include "SecMain.h"

+

+    .686

+    .model  flat,C

+    .code

+

+EXTERN SecCoreStartupWithStack:PROC

+

+;

+;  SecCore Entry Point

+;

+;  Processor is in flat protected mode

+;

+;  @param  ESI  Pointer to SEC Core Entry Point (this function)

+;  @param  EDI  Pointer to PEI Core Entry Point

+;  @param  EBP  Pointer to the start of the Boot Firmware Volume

+;

+;  @return None

+;

+;

+_ModuleEntryPoint PROC PUBLIC

+

+    ;

+    ; Load temporary stack top at very low memory.  The C code

+    ; can reload to a better address.

+    ;

+    mov     eax, INITIAL_TOP_OF_STACK

+    mov     esp, eax

+    nop

+

+    ;

+    ; Call into C code

+    ;

+    push    eax

+    push    edi

+    push    esi

+    push    ebp

+    call    SecCoreStartupWithStack

+

+_ModuleEntryPoint ENDP

+

+END

diff --git a/OvmfPkg/Sec/Ia32/Stack.S b/OvmfPkg/Sec/Ia32/Stack.S
new file mode 100644
index 0000000..1f8ad19
--- /dev/null
+++ b/OvmfPkg/Sec/Ia32/Stack.S
@@ -0,0 +1,93 @@
+#------------------------------------------------------------------------------

+#

+# Copyright (c) 2008, Intel Corporation

+# All rights reserved. This program and the accompanying materials

+# are licensed and made available under the terms and conditions of the BSD License

+# which accompanies this distribution.  The full text of the license may be found at

+# http://opensource.org/licenses/bsd-license.php

+#

+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+# Module Name:

+#

+#   Stack.asm

+#

+# Abstract:

+#

+#   Switch the stack from temporary memory to permenent memory.

+#

+#------------------------------------------------------------------------------

+

+#------------------------------------------------------------------------------

+# VOID

+# EFIAPI

+# SecSwitchStack (

+#   UINT32   TemporaryMemoryBase,

+#   UINT32   PermenentMemoryBase

+#   );

+#------------------------------------------------------------------------------    

+

+#include <ProcessorBind.h>

+

+ASM_GLOBAL ASM_PFX(SecSwitchStack)

+ASM_PFX(SecSwitchStack):

+#

+# Save three register: eax, ebx, ecx

+#    

+    push  %eax

+    push  %ebx

+    push  %ecx

+    push  %edx

+    

+#

+# !!CAUTION!! this function address's is pushed into stack after

+# migration of whole temporary memory, so need save it to permenent

+# memory at first!

+#    

+    

+    movl  20(%esp), %ebx            # Save the first parameter

+    movl  24(%esp), %ecx            # Save the second parameter

+    

+#

+# Save this function's return address into permenent memory at first.

+# Then, Fixup the esp point to permenent memory

+#

+

+    movl  %esp, %eax

+    subl  %ebx, %eax

+    addl  %ecx, %eax

+    movl  (%esp), %edx                 # copy pushed register's value to permenent memory

+    movl  %edx, (%eax)

+    movl  4(%esp), %edx

+    movl  %edx, 4(%eax)

+    movl  8(%esp), %edx

+    movl  %edx, 8(%eax)

+    movl  12(%esp), %edx

+    movl  %edx, 12(%eax)

+    movl  16(%esp), %edx

+    movl  %edx, 16(%eax)

+    movl  %eax, %esp                   # From now, esp is pointed to permenent memory

+

+#

+# Fixup the ebp point to permenent memory

+#

+    movl   %ebp, %eax

+    subl   %ebx, %eax

+    addl   %ecx, %eax

+    movl   %eax, %ebp                  # From now, ebp is pointed to permenent memory

+    

+#

+# Fixup callee's ebp point for PeiDispatch

+#    

+    movl   (%ebp), %eax

+    subl   %ebx, %eax

+    addl   %ecx, %eax

+    movl   %eax, (%ebp)                # From now, Temporary's PPI caller's stack is in permenent memory

+    

+    pop   %edx

+    pop   %ecx

+    pop   %ebx

+    pop   %eax

+    ret

+

diff --git a/OvmfPkg/Sec/Ia32/SwitchStack.c b/OvmfPkg/Sec/Ia32/SwitchStack.c
new file mode 100644
index 0000000..54fde94
--- /dev/null
+++ b/OvmfPkg/Sec/Ia32/SwitchStack.c
@@ -0,0 +1,136 @@
+/** @file

+  Switch Stack functions.

+

+  Copyright (c) 2006 - 2007, Intel Corporation<BR>

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+//

+// Include common header file for this module.

+//

+

+

+#include <Library/BaseLib.h>

+#include <Library/BaseMemoryLib.h>

+#include <Library/DebugLib.h>

+#include <Library/PeiServicesLib.h>

+

+/**

+  Transfers control to a function starting with a new stack.

+

+  Transfers control to the function specified by EntryPoint using the new stack

+  specified by NewStack and passing in the parameters specified by Context1 and

+  Context2. Context1 and Context2 are optional and may be NULL. The function

+  EntryPoint must never return.

+

+  If EntryPoint is NULL, then ASSERT().

+  If NewStack is NULL, then ASSERT().

+

+  @param  EntryPoint  A pointer to function to call with the new stack.

+  @param  Context1    A pointer to the context to pass into the EntryPoint

+                      function.

+  @param  Context2    A pointer to the context to pass into the EntryPoint

+                      function.

+  @param  NewStack    A pointer to the new stack to use for the EntryPoint

+                      function.

+  @param  NewBsp      A pointer to the new BSP for the EntryPoint on IPF. It's

+                      Reserved on other architectures.

+

+**/

+VOID

+EFIAPI

+PeiSwitchStacks (

+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,

+  IN      VOID                      *Context1,  OPTIONAL

+  IN      VOID                      *Context2,  OPTIONAL

+  IN      VOID                      *Context3,  OPTIONAL

+  IN      VOID                      *OldTopOfStack,

+  IN      VOID                      *NewStack

+  )

+{

+  BASE_LIBRARY_JUMP_BUFFER  JumpBuffer;

+  

+  ASSERT (EntryPoint != NULL);

+  ASSERT (NewStack != NULL);

+

+  //

+  // Stack should be aligned with CPU_STACK_ALIGNMENT

+  //

+  ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);

+

+  JumpBuffer.Eip = (UINTN)EntryPoint;

+  JumpBuffer.Esp = (UINTN)NewStack - sizeof (VOID*);

+  JumpBuffer.Esp -= sizeof (Context1) + sizeof (Context2) + sizeof(Context3);

+  ((VOID**)JumpBuffer.Esp)[1] = Context1;

+  ((VOID**)JumpBuffer.Esp)[2] = Context2;

+  ((VOID**)JumpBuffer.Esp)[3] = Context3;

+

+  LongJump (&JumpBuffer, (UINTN)-1);

+

+  //

+  // InternalSwitchStack () will never return

+  //

+  ASSERT (FALSE);  

+}

+

+/**

+  Transfers control to a function starting with a new stack.

+

+  Transfers control to the function specified by EntryPoint using the new stack

+  specified by NewStack and passing in the parameters specified by Context1 and

+  Context2. Context1 and Context2 are optional and may be NULL. The function

+  EntryPoint must never return.

+

+  If EntryPoint is NULL, then ASSERT().

+  If NewStack is NULL, then ASSERT().

+

+  @param  EntryPoint  A pointer to function to call with the new stack.

+  @param  Context1    A pointer to the context to pass into the EntryPoint

+                      function.

+  @param  Context2    A pointer to the context to pass into the EntryPoint

+                      function.

+  @param  NewStack    A pointer to the new stack to use for the EntryPoint

+                      function.

+  @param  NewBsp      A pointer to the new BSP for the EntryPoint on IPF. It's

+                      Reserved on other architectures.

+

+**/

+VOID

+EFIAPI

+SecSwitchStack (

+  IN UINTN   TemporaryMemoryBase,

+  IN UINTN   PermanentMemoryBase,

+  IN UINTN   CopySize

+  )

+{

+  BASE_LIBRARY_JUMP_BUFFER  JumpBuffer;

+  UINTN                     SetJumpFlag;

+

+  ASSERT ((VOID*)TemporaryMemoryBase != NULL);

+  ASSERT ((VOID*)PermanentMemoryBase != NULL);

+

+  SetJumpFlag = SetJump (&JumpBuffer);

+  //

+  // The initial call to SetJump() must always return 0.

+  // Subsequent calls to LongJump() may cause a non-zero value to be returned by SetJump().

+  //

+  if (SetJumpFlag == 0) {

+    DEBUG ((EFI_D_ERROR, "SecSwitchStack+%d: Esp: 0x%xL\n", __LINE__, JumpBuffer.Esp));

+    JumpBuffer.Esp =

+      (INTN)JumpBuffer.Esp -

+      (INTN)TemporaryMemoryBase +

+      (INTN)PermanentMemoryBase;

+    MemoryFence ();

+    CopyMem((VOID*)PermanentMemoryBase, (VOID*)TemporaryMemoryBase, CopySize);

+    LongJump (&JumpBuffer, (UINTN)-1);

+  }

+

+}

+

diff --git a/OvmfPkg/Sec/SecMain.c b/OvmfPkg/Sec/SecMain.c
new file mode 100644
index 0000000..1dafa05
--- /dev/null
+++ b/OvmfPkg/Sec/SecMain.c
@@ -0,0 +1,171 @@
+/** @file
+  Main SEC phase code.  Transitions to PEI.
+
+  Copyright (c) 2008 - 2009, Intel Corporation
+
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Ppi/TemporaryRamSupport.h>
+#include <Library/PcdLib.h>
+
+#include "SecMain.h"
+
+EFI_STATUS
+EFIAPI
+TemporaryRamMigration (
+  IN CONST EFI_PEI_SERVICES   **PeiServices,
+  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,
+  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,
+  IN UINTN                    CopySize
+  );
+
+STATIC TEMPORARY_RAM_SUPPORT_PPI mTempRamSupportPpi = {
+  (TEMPORARY_RAM_MIGRATION) TemporaryRamMigration
+};
+
+STATIC EFI_PEI_PPI_DESCRIPTOR mPrivateDispatchTable[] = {
+  {
+    (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+    &gEfiTemporaryRamSupportPpiGuid,
+    &mTempRamSupportPpi
+  },
+};
+
+
+VOID
+InitializeIdtPtr (
+  IN VOID* IdtPtr
+  )
+{
+  IA32_DESCRIPTOR             IdtDescriptor;
+
+  IdtDescriptor.Base  = (UINTN)IdtPtr;
+  IdtDescriptor.Limit = (UINT16) 0;
+  AsmWriteIdtr (&IdtDescriptor);
+}
+
+VOID
+EFIAPI
+SecCoreStartupWithStack (
+  IN VOID       *BootFirmwareVolumePtr,
+  IN VOID       *SecCoreEntryPoint,
+  IN VOID       *PeiCoreEntryPoint,
+  IN VOID       *TopOfCurrentStack
+  )
+{
+  EFI_SEC_PEI_HAND_OFF        *SecCoreData;
+  UINT8                       *BottomOfTempRam;
+  UINT8                       *TopOfTempRam;
+  UINTN                       SizeOfTempRam;
+  VOID                        *IdtPtr;
+
+  DEBUG ((EFI_D_ERROR,
+    "SecCoreStartupWithStack(0x%x, 0x%x, 0x%x, 0x%x)\n",
+    (UINT32)(UINTN)BootFirmwareVolumePtr,
+    (UINT32)(UINTN)SecCoreEntryPoint,
+    (UINT32)(UINTN)PeiCoreEntryPoint,
+    (UINT32)(UINTN)TopOfCurrentStack));
+
+  
+  BottomOfTempRam = (UINT8*)(UINTN) INITIAL_TOP_OF_STACK;
+  SizeOfTempRam = (UINTN) SIZE_64KB;
+  TopOfTempRam = BottomOfTempRam + SizeOfTempRam;
+
+  //
+  // |-------------|
+  // | SecCoreData | 4k
+  // |-------------|
+  // |    Heap     | 28k
+  // |-------------|
+  // |   Stack     | 32k
+  // |-------------| <---- INITIAL_TOP_OF_STACK
+  //
+
+  //
+  // Bind this information into the SEC hand-off state
+  //
+  SecCoreData = (EFI_SEC_PEI_HAND_OFF*)((UINTN) TopOfTempRam - SIZE_4KB);
+  SecCoreData->DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
+
+  SecCoreData->BootFirmwareVolumeBase = (VOID*)(UINTN) PcdGet32 (PcdOvmfFlashFvRecoveryBase);
+  SecCoreData->BootFirmwareVolumeSize = PcdGet32 (PcdOvmfFlashFvRecoverySize);
+
+  SecCoreData->TemporaryRamBase       = (VOID*) BottomOfTempRam;
+  SecCoreData->TemporaryRamSize       = SizeOfTempRam;
+
+  SecCoreData->PeiTemporaryRamSize    = 28 * SIZE_1KB;
+  SecCoreData->PeiTemporaryRamBase    = (VOID*)((UINTN)SecCoreData - SecCoreData->PeiTemporaryRamSize);
+
+  SecCoreData->StackBase              = SecCoreData->TemporaryRamBase;
+  SecCoreData->StackSize              = (UINTN)SecCoreData->PeiTemporaryRamBase - (UINTN)SecCoreData->TemporaryRamBase;
+
+  //
+  // Initialize the IDT Pointer, since IA32 & X64 architectures
+  // use it to store the PEI Services pointer.
+  //
+  IdtPtr = (VOID*)((UINT8*)SecCoreData + sizeof (*SecCoreData) + sizeof (UINTN));
+  IdtPtr = ALIGN_POINTER(IdtPtr, 16);
+  InitializeIdtPtr (IdtPtr);
+
+  //
+  // Transfer control to the PEI Core
+  //
+  PeiSwitchStacks (
+    (SWITCH_STACK_ENTRY_POINT) (UINTN) PeiCoreEntryPoint,
+    SecCoreData,
+    (VOID *) (UINTN) ((EFI_PEI_PPI_DESCRIPTOR *) &mPrivateDispatchTable),
+    NULL,
+    TopOfCurrentStack,
+    (VOID *)((UINTN)SecCoreData->StackBase + SecCoreData->StackSize)
+    );
+
+  //
+  // If we get here, then the PEI Core returned.  This is an error
+  //
+  ASSERT (FALSE);
+  CpuDeadLoop ();
+}
+
+EFI_STATUS
+EFIAPI
+TemporaryRamMigration (
+  IN CONST EFI_PEI_SERVICES   **PeiServices,
+  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,
+  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,
+  IN UINTN                    CopySize
+  )
+{
+  DEBUG ((EFI_D_ERROR, "TemporaryRamMigration(0x%x, 0x%x, 0x%x)\n", (UINTN)TemporaryMemoryBase, (UINTN)PermanentMemoryBase, CopySize));
+
+  //
+  // Migrate the whole temporary memory to permenent memory.
+  // 
+  CopyMem((VOID*)(UINTN)PermanentMemoryBase, (VOID*)(UINTN)TemporaryMemoryBase, CopySize);
+
+  //
+  // SecSwitchStack function must be invoked after the memory migration
+  // immediatly, also we need fixup the stack change caused by new call into 
+  // permenent memory.
+  // 
+  SecSwitchStack (
+    (UINTN) TemporaryMemoryBase,
+    (UINTN) PermanentMemoryBase,
+    CopySize
+    );
+
+  return EFI_SUCCESS;
+}
+
diff --git a/OvmfPkg/Sec/SecMain.h b/OvmfPkg/Sec/SecMain.h
new file mode 100644
index 0000000..50c5b29
--- /dev/null
+++ b/OvmfPkg/Sec/SecMain.h
@@ -0,0 +1,50 @@
+/** @file
+  Header file for SEC code
+
+  Copyright (c) 2008 - 2009, Intel Corporation
+
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PLATFORM_SECMAIN_H_
+#define _PLATFORM_SECMAIN_H_
+
+VOID
+EFIAPI
+PeiSwitchStacks (
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,
+  IN      VOID                      *Context1,  OPTIONAL
+  IN      VOID                      *Context2,  OPTIONAL
+  IN      VOID                      *Context3,  OPTIONAL
+  IN      VOID                      *OldTopOfStack,
+  IN      VOID                      *NewStack
+  );
+
+VOID
+EFIAPI
+SecSwitchStack (
+  IN UINTN   TemporaryMemoryBase,
+  IN UINTN   PermanentMemoryBase,
+  IN UINTN   CopySize
+  );
+
+EFI_STATUS
+EFIAPI
+TemporaryRamMigration (
+  IN CONST EFI_PEI_SERVICES   **PeiServices,
+  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,
+  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,
+  IN UINTN                    CopySize
+  );
+
+#define INITIAL_TOP_OF_STACK      BASE_128KB
+
+#endif // _PLATFORM_SECMAIN_H_
+
diff --git a/OvmfPkg/Sec/SecMain.inf b/OvmfPkg/Sec/SecMain.inf
new file mode 100644
index 0000000..1646cce
--- /dev/null
+++ b/OvmfPkg/Sec/SecMain.inf
@@ -0,0 +1,58 @@
+#/** @file

+#  SEC Driver

+#

+#  Copyright (c) 2008, Intel Corporation

+#

+#  All rights reserved. This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution. The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+#

+#**/

+

+[Defines]

+  INF_VERSION                    = 0x00010005

+  BASE_NAME                      = SecMain

+  FILE_GUID                      = df1ccef6-f301-4a63-9661-fc6030dcc880

+  MODULE_TYPE                    = SEC

+  VERSION_STRING                 = 1.0

+  EDK_RELEASE_VERSION            = 0x00020000

+  EFI_SPECIFICATION_VERSION      = 0x00020000

+  ENTRY_POINT                    = SecMain

+

+#

+# The following information is for reference only and not required by the build tools.

+#

+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC

+#

+

+[Sources.common]

+  SecMain.c

+

+[Sources.IA32]

+  Ia32/SecEntry.asm

+  Ia32/SecEntry.S

+  Ia32/SwitchStack.c

+

+[Sources.X64]

+  X64/SecEntry.asm

+  X64/SecEntry.S

+  X64/SwitchStack.c

+

+[Packages]

+  MdePkg/MdePkg.dec

+  OvmfPkg/OvmfPkg.dec

+

+[LibraryClasses]

+  BaseLib

+

+[Ppis]

+  gEfiTemporaryRamSupportPpiGuid                # PPI ALWAYS_PRODUCED

+

+[FixedPcd.common]

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoveryBase

+  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashFvRecoverySize

+

diff --git a/OvmfPkg/Sec/X64/SecEntry.S b/OvmfPkg/Sec/X64/SecEntry.S
new file mode 100644
index 0000000..42b3022
--- /dev/null
+++ b/OvmfPkg/Sec/X64/SecEntry.S
@@ -0,0 +1,60 @@
+#      TITLE   SecEntry.asm
+
+#------------------------------------------------------------------------------
+#*
+#*   Copyright 2006 - 2009, Intel Corporation
+#*   All rights reserved. This program and the accompanying materials
+#*   are licensed and made available under the terms and conditions of the BSD License
+#*   which accompanies this distribution.  The full text of the license may be found at
+#*   http://opensource.org/licenses/bsd-license.php
+#*
+#*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+#*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#*
+#*    CpuAsm.asm
+#*
+#*   Abstract:
+#*
+#------------------------------------------------------------------------------
+
+
+#include "SecMain.h"
+
+#EXTERN ASM_PFX(SecCoreStartupWithStack)
+
+#
+#  SecCore Entry Point
+#
+#  Processor is in flat protected mode
+#
+#  @param  ESI  Pointer to SEC Core Entry Point (this function)
+#  @param  EDI  Pointer to PEI Core Entry Point
+#  @param  EBP  Pointer to the start of the Boot Firmware Volume
+#
+#  @return None
+#
+#
+.intel_syntax
+ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+
+    #
+    # Load temporary stack top at very low memory.  The C code
+    # can reload to a better address.
+    #
+    mov     %rsp, INITIAL_TOP_OF_STACK
+    nop
+
+    #
+    # Setup parameters and call SecCoreStartupWithStack
+    #   rcx: BootFirmwareVolumePtr
+    #   rdx: SecCoreEntryPoint
+    #   r8:  PeiCoreEntryPoint
+    #   r9:  TopOfCurrentStack
+    #
+    mov     %rcx, %rbp
+    mov     %rdx, %rsi
+    mov     %r8, %rdi
+    mov     %r9, %rsp
+    call    ASM_PFX(SecCoreStartupWithStack)
+
diff --git a/OvmfPkg/Sec/X64/SecEntry.asm b/OvmfPkg/Sec/X64/SecEntry.asm
new file mode 100644
index 0000000..8b836de
--- /dev/null
+++ b/OvmfPkg/Sec/X64/SecEntry.asm
@@ -0,0 +1,61 @@
+      TITLE   SecEntry.asm

+;------------------------------------------------------------------------------

+;*

+;*   Copyright 2006 - 2009, Intel Corporation

+;*   All rights reserved. This program and the accompanying materials

+;*   are licensed and made available under the terms and conditions of the BSD License

+;*   which accompanies this distribution.  The full text of the license may be found at

+;*   http://opensource.org/licenses/bsd-license.php

+;*

+;*   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+;*   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+;*

+;*    CpuAsm.asm

+;*

+;*   Abstract:

+;*

+;------------------------------------------------------------------------------

+

+#include "SecMain.h"

+

+.code

+

+EXTERN SecCoreStartupWithStack:PROC

+

+;

+;  SecCore Entry Point

+;

+;  Processor is in flat protected mode

+;

+;  @param  ESI  Pointer to SEC Core Entry Point (this function)

+;  @param  EDI  Pointer to PEI Core Entry Point

+;  @param  EBP  Pointer to the start of the Boot Firmware Volume

+;

+;  @return None

+;

+;

+_ModuleEntryPoint PROC PUBLIC

+

+    ;

+    ; Load temporary stack top at very low memory.  The C code

+    ; can reload to a better address.

+    ;

+    mov     rsp, INITIAL_TOP_OF_STACK

+    nop

+

+    ;

+    ; Setup parameters and call SecCoreStartupWithStack

+    ;   rcx: BootFirmwareVolumePtr

+    ;   rdx: SecCoreEntryPoint

+    ;   r8:  PeiCoreEntryPoint

+    ;   r9:  TopOfCurrentStack

+    ;

+    mov     rcx, rbp

+    mov     rdx, rsi

+    mov     r8, rdi

+    mov     r9, rsp

+    call    SecCoreStartupWithStack

+

+_ModuleEntryPoint ENDP

+

+END

diff --git a/OvmfPkg/Sec/X64/SwitchStack.c b/OvmfPkg/Sec/X64/SwitchStack.c
new file mode 100644
index 0000000..3ff98ba
--- /dev/null
+++ b/OvmfPkg/Sec/X64/SwitchStack.c
@@ -0,0 +1,165 @@
+/** @file

+  Switch Stack functions.

+

+  Copyright (c) 2006 - 2007, Intel Corporation<BR>

+  All rights reserved. This program and the accompanying materials

+  are licensed and made available under the terms and conditions of the BSD License

+  which accompanies this distribution.  The full text of the license may be found at

+  http://opensource.org/licenses/bsd-license.php

+

+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

+

+**/

+

+//

+// Include common header file for this module.

+//

+

+

+#include <Library/BaseLib.h>

+#include <Library/BaseMemoryLib.h>

+#include <Library/DebugLib.h>

+#include <Library/PeiServicesLib.h>

+

+//

+// Type define for PEI Core Entry Point function

+//

+typedef

+VOID

+(EFIAPI *PEI_CORE_ENTRY_POINT)(

+  IN CONST EFI_SEC_PEI_HAND_OFF        *SecCoreData,

+  IN CONST EFI_PEI_PPI_DESCRIPTOR      *PpiList,

+  IN VOID                              *Data

+  )

+;

+

+/**

+  Transfers control to a function starting with a new stack.

+

+  Transfers control to the function specified by EntryPoint using the new stack

+  specified by NewStack and passing in the parameters specified by Context1 and

+  Context2. Context1 and Context2 are optional and may be NULL. The function

+  EntryPoint must never return.

+

+  If EntryPoint is NULL, then ASSERT().

+  If NewStack is NULL, then ASSERT().

+

+  @param  EntryPoint  A pointer to function to call with the new stack.

+  @param  Context1    A pointer to the context to pass into the EntryPoint

+                      function.

+  @param  Context2    A pointer to the context to pass into the EntryPoint

+                      function.

+  @param  NewStack    A pointer to the new stack to use for the EntryPoint

+                      function.

+  @param  NewBsp      A pointer to the new BSP for the EntryPoint on IPF. It's

+                      Reserved on other architectures.

+

+**/

+VOID

+EFIAPI

+PeiSwitchStacks (

+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,

+  IN      VOID                      *Context1,  OPTIONAL

+  IN      VOID                      *Context2,  OPTIONAL

+  IN      VOID                      *Context3,  OPTIONAL

+  IN      VOID                      *OldTopOfStack,

+  IN      VOID                      *NewStack

+  )

+{

+  BASE_LIBRARY_JUMP_BUFFER  JumpBuffer;

+  UINTN                     SizeOfStackUsed;

+  UINTN                     SetJumpFlag;

+  

+  ASSERT (EntryPoint != NULL);

+  ASSERT (NewStack != NULL);

+

+  SetJumpFlag = SetJump (&JumpBuffer);

+  //

+  // The initial call to SetJump() must always return 0.

+  // Subsequent calls to LongJump() may cause a non-zero value to be returned by SetJump().

+  //

+  if (SetJumpFlag == 0) {

+    //

+    // Stack should be aligned with CPU_STACK_ALIGNMENT

+    //

+    ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);

+  

+    //JumpBuffer.Rip = (UINTN)EntryPoint;

+    SizeOfStackUsed = (UINTN)OldTopOfStack - JumpBuffer.Rsp;

+    JumpBuffer.Rsp = (UINTN)NewStack - SizeOfStackUsed;

+    MemoryFence ();

+    CopyMem (

+      (VOID*) ((UINTN)NewStack - SizeOfStackUsed),

+      (VOID*) ((UINTN)OldTopOfStack - SizeOfStackUsed),

+      SizeOfStackUsed

+      );

+    LongJump (&JumpBuffer, (UINTN)-1);

+  } else {

+    (*(PEI_CORE_ENTRY_POINT)(EntryPoint)) (

+      (EFI_SEC_PEI_HAND_OFF *) Context1,

+      (EFI_PEI_PPI_DESCRIPTOR *) Context2,

+      Context3

+      );

+  }

+

+  //

+  // InternalSwitchStack () will never return

+  //

+  ASSERT (FALSE);  

+}

+

+/**

+  Transfers control to a function starting with a new stack.

+

+  Transfers control to the function specified by EntryPoint using the new stack

+  specified by NewStack and passing in the parameters specified by Context1 and

+  Context2. Context1 and Context2 are optional and may be NULL. The function

+  EntryPoint must never return.

+

+  If EntryPoint is NULL, then ASSERT().

+  If NewStack is NULL, then ASSERT().

+

+  @param  EntryPoint  A pointer to function to call with the new stack.

+  @param  Context1    A pointer to the context to pass into the EntryPoint

+                      function.

+  @param  Context2    A pointer to the context to pass into the EntryPoint

+                      function.

+  @param  NewStack    A pointer to the new stack to use for the EntryPoint

+                      function.

+  @param  NewBsp      A pointer to the new BSP for the EntryPoint on IPF. It's

+                      Reserved on other architectures.

+

+**/

+VOID

+EFIAPI

+SecSwitchStack (

+  IN UINTN   TemporaryMemoryBase,

+  IN UINTN   PermanentMemoryBase,

+  IN UINTN   CopySize

+  )

+{

+  BASE_LIBRARY_JUMP_BUFFER  JumpBuffer;

+  UINTN                     SetJumpFlag;

+

+  ASSERT ((VOID*)TemporaryMemoryBase != NULL);

+  ASSERT ((VOID*)PermanentMemoryBase != NULL);

+

+  SetJumpFlag = SetJump (&JumpBuffer);

+  //

+  // The initial call to SetJump() must always return 0.

+  // Subsequent calls to LongJump() may cause a non-zero value to be returned by SetJump().

+  //

+  if (SetJumpFlag == 0) {

+    DEBUG ((EFI_D_ERROR, "SecSwitchStack+%d: Rsp: 0x%xL\n", __LINE__, JumpBuffer.Rsp));

+    JumpBuffer.Rsp =

+      (INTN)JumpBuffer.Rsp -

+      (INTN)TemporaryMemoryBase +

+      (INTN)PermanentMemoryBase;

+    MemoryFence ();

+    CopyMem((VOID*)PermanentMemoryBase, (VOID*)TemporaryMemoryBase, CopySize);

+    LongJump (&JumpBuffer, (UINTN)-1);

+  }

+

+}

+