Optimize x86 long arithmetic
Be smarter about taking advantage of a constant operand for x86 long
add/sub/and/or/xor. Using instructions with immediates and generating
results directly into memory reduces the number of temporary registers
and avoids hardcoded register usage.
Also rewrite the existing non-const x86 arithmetic to avoid fixed
register use, and use the fact that x86 instructions are two operand.
Pass the opcode to the XXXLong() routines to easily detect two operand
DEX opcodes.
Add a new StoreFinalValueWide() routine, which is similar to StoreValueWide,
but doesn't do an EvalLoc to allocate registers. The src operand must
already be in registers, and it just updates the dest location, and
calls the right live/dirty routines to get the src into the dest
properly.
Change-Id: Iefc16e7bc2236a73dc780d3d5137ae8343171f62
Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
diff --git a/compiler/dex/quick/mir_to_lir.h b/compiler/dex/quick/mir_to_lir.h
index c157327..a0a84fa 100644
--- a/compiler/dex/quick/mir_to_lir.h
+++ b/compiler/dex/quick/mir_to_lir.h
@@ -627,6 +627,18 @@
*/
void StoreValueWide(RegLocation rl_dest, RegLocation rl_src);
+ /**
+ * @brief Used to do the final store in a wide destination as per bytecode semantics.
+ * @see StoreValueWide
+ * @param rl_dest The destination dalvik register location.
+ * @param rl_src The source register location. It must be kLocPhysReg
+ *
+ * This is used for x86 two operand computations, where we have computed the correct
+ * register values that now need to be properly registered. This is used to avoid an
+ * extra pair of register copies that would result if StoreValueWide was called.
+ */
+ void StoreFinalValueWide(RegLocation rl_dest, RegLocation rl_src);
+
// Shared by all targets - implemented in mir_to_lir.cc.
void CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list);
void HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir);
@@ -695,11 +707,14 @@
// Required for target - Dalvik-level generators.
virtual void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
RegLocation rl_src1, RegLocation rl_src2) = 0;
- virtual void GenMulLong(RegLocation rl_dest, RegLocation rl_src1,
+ virtual void GenMulLong(Instruction::Code,
+ RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2) = 0;
- virtual void GenAddLong(RegLocation rl_dest, RegLocation rl_src1,
+ virtual void GenAddLong(Instruction::Code,
+ RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2) = 0;
- virtual void GenAndLong(RegLocation rl_dest, RegLocation rl_src1,
+ virtual void GenAndLong(Instruction::Code,
+ RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2) = 0;
virtual void GenArithOpDouble(Instruction::Code opcode,
RegLocation rl_dest, RegLocation rl_src1,
@@ -727,11 +742,14 @@
virtual bool GenInlinedPeek(CallInfo* info, OpSize size) = 0;
virtual bool GenInlinedPoke(CallInfo* info, OpSize size) = 0;
virtual void GenNegLong(RegLocation rl_dest, RegLocation rl_src) = 0;
- virtual void GenOrLong(RegLocation rl_dest, RegLocation rl_src1,
+ virtual void GenOrLong(Instruction::Code,
+ RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2) = 0;
- virtual void GenSubLong(RegLocation rl_dest, RegLocation rl_src1,
+ virtual void GenSubLong(Instruction::Code,
+ RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2) = 0;
- virtual void GenXorLong(RegLocation rl_dest, RegLocation rl_src1,
+ virtual void GenXorLong(Instruction::Code,
+ RegLocation rl_dest, RegLocation rl_src1,
RegLocation rl_src2) = 0;
virtual LIR* GenRegMemCheck(ConditionCode c_code, int reg1, int base,
int offset, ThrowKind kind) = 0;
@@ -836,6 +854,20 @@
return cu_;
}
+ /*
+ * @brief Force a location (in a register) into a temporary register
+ * @param loc location of result
+ * @returns update location
+ */
+ RegLocation ForceTemp(RegLocation loc);
+
+ /*
+ * @brief Force a wide location (in registers) into temporary registers
+ * @param loc location of result
+ * @returns update location
+ */
+ RegLocation ForceTempWide(RegLocation loc);
+
private:
void GenInstanceofFinal(bool use_declaring_class, uint32_t type_idx, RegLocation rl_dest,
RegLocation rl_src);