ART: Enable the use of relative addresses in the arm64 disassembler.
Also, only keep register aliases for the link register 'lr' and the
thread register 'tr' in the arm64 disassembler. Other aliases are not
very important, and this way we don't have to provide aliases
specialised for Quick or Optimizing.
Change-Id: Ie7a04910f0c587710a0cf2648203d7e89eab5d1f
diff --git a/disassembler/disassembler_arm64.h b/disassembler/disassembler_arm64.h
index 57f11c8..3fb5c7f 100644
--- a/disassembler/disassembler_arm64.h
+++ b/disassembler/disassembler_arm64.h
@@ -30,8 +30,12 @@
class CustomDisassembler FINAL : public vixl::Disassembler {
public:
- explicit CustomDisassembler(bool read_literals) :
- vixl::Disassembler(), read_literals_(read_literals) {}
+ explicit CustomDisassembler(DisassemblerOptions* options) :
+ vixl::Disassembler(), read_literals_(options->can_read_literals_) {
+ if (!options->absolute_addresses_) {
+ MapCodeAddress(0, reinterpret_cast<const vixl::Instruction*>(options->base_address_));
+ }
+ }
// Use register aliases in the disassembly.
void AppendRegisterNameToOutput(const vixl::Instruction* instr,
@@ -55,11 +59,8 @@
class DisassemblerArm64 FINAL : public Disassembler {
public:
- // TODO: Update this code once VIXL provides the ability to map code addresses
- // to disassemble as a different address (the way FormatInstructionPointer()
- // does).
explicit DisassemblerArm64(DisassemblerOptions* options) :
- Disassembler(options), disasm(options->can_read_literals_) {
+ Disassembler(options), disasm(options) {
decoder.AppendVisitor(&disasm);
}