ART: Fix vectorizer HalvingAdd idiom.

IsAddConst2 function tried to extract addition chains
for the halving add idiom: (A + B) >> 1. The problem
was that regular shift right (x >> 1) was accepted for the
idiom (with {A: x, B: 0}) and not processed as a shift - which
broke the assumptions on shifts right and operand signedness.
This CL fixes that.

Test: 646-checker-simd-hadd.
Test: test-art-target.

Change-Id: Icf71e1a8e8c54e68114d7d5d6c4aa8a47ea5234d
6 files changed