commit | 68d9fb7c34df576eacf8c69c9557b2f9a2f1c81d | [log] [tgz] |
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author | Aart Bik <ajcbik@google.com> | Mon May 01 16:50:45 2017 -0700 |
committer | Aart Bik <ajcbik@google.com> | Tue May 02 20:11:36 2017 -0700 |
tree | f6889b20cb3494ca1b7f55809b6c3081ee3b5ae3 | |
parent | 656cf06fc60cb6f4c855abfdef15005de724a6f6 [diff] |
Bug fix on shift that exceeds "lane width". Rationale: ARM is a bit less forgiving on shifting more than the lane width of the SIMD instruction (rejecting such cases is no loss, since it yields 0 anyway and should be optimized differently). Bug: 37776122 Test: test-art-target, test-art-host (cherry picked from commit 65ffd8ef044465c47d4f97ab2556310f9ee30a01) Change-Id: If65148eb0e8e705f48778549b7e31b8077cd233b