commit 673d1fb3a9db020cdebc6a05f9b53fc43ad524ed
author Narayan Kamath <narayan@google.com> Mon Aug 15 16:08:18 2016 +0100
committer Narayan Kamath <narayan@google.com> Thu Aug 18 10:36:29 2016 +0100
tree c1ae618d0af044714724bddb796bbc34aeafdb42
parent d1272553516e6595dea310d07d7b974dcd0a421f

dex_instruction: k45cc HasVarArgs

Change-Id: I3be92269bb78c96ec41ab533c5792bd369c02178
Test: make test-art-host
bug: 30550796

runtime/dex_instruction-inl.h

diff --git a/runtime/dex_instruction-inl.h b/runtime/dex_instruction-inl.h
index 3d0fea0..f6ed1f0 100644
--- a/runtime/dex_instruction-inl.h
+++ b/runtime/dex_instruction-inl.h
@@ -505,11 +505,11 @@
 }
 
 inline bool Instruction::HasVarArgs() const {
-  return FormatOf(Opcode()) == k35c;
+  return (FormatOf(Opcode()) == k35c) || (FormatOf(Opcode()) == k45cc);
 }
 
 inline void Instruction::GetVarArgs(uint32_t arg[kMaxVarArgRegs], uint16_t inst_data) const {
-  DCHECK_EQ(FormatOf(Opcode()), k35c);
+  DCHECK(HasVarArgs());
 
   /*
    * Note that the fields mentioned in the spec don't appear in

runtime/dex_instruction_test.cc

diff --git a/runtime/dex_instruction_test.cc b/runtime/dex_instruction_test.cc
index 00c8e07..95e4181 100644
--- a/runtime/dex_instruction_test.cc
+++ b/runtime/dex_instruction_test.cc
@@ -92,6 +92,15 @@
   ASSERT_TRUE(ins->HasVRegH());
   ASSERT_EQ(32, ins->VRegH());
   ASSERT_EQ(32, ins->VRegH_45cc());
+
+  ASSERT_TRUE(ins->HasVarArgs());
+
+  uint32_t arg_regs[Instruction::kMaxVarArgRegs];
+  ins->GetVarArgs(arg_regs);
+  ASSERT_EQ(0xeu, arg_regs[0]);
+  ASSERT_EQ(0xfu, arg_regs[1]);
+  ASSERT_EQ(0xau, arg_regs[2]);
+  ASSERT_EQ(0xcu, arg_regs[3]);
 }
 
 TEST(Instruction, PropertiesOf4rcc) {
@@ -118,6 +127,8 @@
   ASSERT_TRUE(ins->HasVRegH());
   ASSERT_EQ(32, ins->VRegH());
   ASSERT_EQ(32, ins->VRegH_4rcc());
+
+  ASSERT_FALSE(ins->HasVarArgs());
 }
 
 }  // namespace art