Add more missing definitions in art::arm::CodeGeneratorARMVIXL.
This fixes build breakages on the read barrier
configuration. These are just dummy definitions, as ART's
AArch32 VIXL back end is work in progress.
Test: ART_USE_READ_BARRIER=true make
Change-Id: I8a0dd9724e4bf95664330232db40fd58bb8d234e
diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc
index 46a68c1..e69528e 100644
--- a/compiler/optimizing/code_generator_arm_vixl.cc
+++ b/compiler/optimizing/code_generator_arm_vixl.cc
@@ -5062,6 +5062,30 @@
}
}
+void CodeGeneratorARMVIXL::GenerateFieldLoadWithBakerReadBarrier(
+ HInstruction* instruction ATTRIBUTE_UNUSED,
+ Location ref ATTRIBUTE_UNUSED,
+ vixl::aarch32::Register obj ATTRIBUTE_UNUSED,
+ uint32_t offset ATTRIBUTE_UNUSED,
+ Location temp ATTRIBUTE_UNUSED,
+ bool needs_null_check ATTRIBUTE_UNUSED) {
+ TODO_VIXL32(FATAL);
+}
+
+void CodeGeneratorARMVIXL::GenerateReferenceLoadWithBakerReadBarrier(
+ HInstruction* instruction ATTRIBUTE_UNUSED,
+ Location ref ATTRIBUTE_UNUSED,
+ vixl::aarch32::Register obj ATTRIBUTE_UNUSED,
+ uint32_t offset ATTRIBUTE_UNUSED,
+ Location index ATTRIBUTE_UNUSED,
+ ScaleFactor scale_factor ATTRIBUTE_UNUSED,
+ Location temp ATTRIBUTE_UNUSED,
+ bool needs_null_check ATTRIBUTE_UNUSED,
+ bool always_update_field ATTRIBUTE_UNUSED,
+ vixl::aarch32::Register* temp2 ATTRIBUTE_UNUSED) {
+ TODO_VIXL32(FATAL);
+}
+
void CodeGeneratorARMVIXL::GenerateReadBarrierSlow(HInstruction* instruction ATTRIBUTE_UNUSED,
Location out ATTRIBUTE_UNUSED,
Location ref ATTRIBUTE_UNUSED,