| commit | 2d10117d8188f57a3964f161366861ae02b954c7 | [log] [tgz] |
|---|---|---|
| author | Evgeny Astigeevich <evgeny.astigeevich@linaro.org> | Thu Jun 25 16:52:03 2020 +0100 |
| committer | Nicolas Geoffray <ngeoffray@google.com> | Fri Jun 26 07:41:20 2020 +0000 |
| tree | 465ea1a6754f8ac097dc23aa22a91abf1c9f8ad9 | |
| parent | a63a2e971079f57d86acd2e736be99fe3f4f4a91 [diff] |
ARM32: Combine LSR into ADD for Div by 2^n Combining LSR into ADD reduces a number of used registers from three to two and a needed number of instructions. This CL implements this optimization. Test: 411-checker-hdiv-hrem-pow2 Test: test.py --host --optimizing --jit --gtest --interpreter Test: test.py --32 --target --optimizing --jit --interpreter Test: run-gtests.sh Change-Id: I230d2623e745884fe4278a860740829ee63750c6