| commit | d7f8e02041e9d16160bc81bd1fa19189bffc04b3 | [log] [tgz] |
|---|---|---|
| author | Zheng Xu <zheng.xu@arm.com> | Thu Mar 13 13:40:30 2014 +0000 |
| committer | Stuart Monteith <srdmarm@gmail.com> | Fri Mar 14 18:38:40 2014 +0000 |
| tree | 7a9b754322f0e8f1a2fc905945aca3b0e5f44489 | |
| parent | 288731acecf3582426c4c1c3e259dcc4d16f113e [diff] |
ARM: Do not allocate temp registers in MulLong if possible. Just use rl_result if we have enough registers and it is *not* either operand. Change-Id: I5a6f3ec09653b97e41bbc6dce823aa8534f98a13