| commit | 0d2cab5c15215eb7a7b9af0ce11f176dcbd69559 | [log] [tgz] |
|---|---|---|
| author | Lena Djokic <Lena.Djokic@mips.com> | Tue Mar 06 15:20:45 2018 +0100 |
| committer | Lena Djokic <Lena.Djokic@mips.com> | Wed Mar 07 11:37:28 2018 +0100 |
| tree | dd4a6564190fe6af52bb968e142deb53a27de6f3 | |
| parent | 7a79ebbd7183cc0fda43512a0add884765fd2bf1 [diff] [blame] |
MIPS: Use PCNT to implement VisitIntegerBitCount() and VisitLongBitCount() Test: ./testrunner.py --target --optimizing in QEMU Test: mma test-art-host-gtest Change-Id: I6ce5bdc86f951094f656c2f81ae8fc836d7a0b5c
diff --git a/compiler/optimizing/intrinsics_mips.h b/compiler/optimizing/intrinsics_mips.h index 13397f1..1c1ba40 100644 --- a/compiler/optimizing/intrinsics_mips.h +++ b/compiler/optimizing/intrinsics_mips.h
@@ -71,6 +71,7 @@ bool IsR2OrNewer() const; bool IsR6() const; bool Is32BitFPU() const; + bool HasMsa() const; private: MipsAssembler* GetAssembler();