rename XXXDflt to XXXDefault (expand for better readability)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16835 6f19259b-4bc3-4df7-8a09-765794883524
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
index 7c6e60f..afe995c 100644
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
@@ -40,9 +40,9 @@
EXTERN GetFspBaseAddress:PROC
EXTERN GetBootFirmwareVolumeOffset:PROC
EXTERN Pei2LoaderSwitchStack:PROC
-EXTERN FspSelfCheck(FspSelfCheckDflt):PROC
-EXTERN LoadUcode(LoadUcodeDflt):PROC
-EXTERN SecPlatformInit(SecPlatformInitDflt):PROC
+EXTERN FspSelfCheck(FspSelfCheckDefault):PROC
+EXTERN LoadUcode(LoadUcodeDefault):PROC
+EXTERN SecPlatformInit(SecPlatformInitDefault):PROC
EXTERN SecCarInit:PROC
;
@@ -82,7 +82,7 @@
ENDM
;------------------------------------------------------------------------------
-FspSelfCheckDflt PROC NEAR PUBLIC
+FspSelfCheckDefault PROC NEAR PUBLIC
; Inputs:
; eax -> Return address
; Outputs:
@@ -97,10 +97,10 @@
xor eax, eax
exit:
jmp ebp
-FspSelfCheckDflt ENDP
+FspSelfCheckDefault ENDP
;------------------------------------------------------------------------------
-SecPlatformInitDflt PROC NEAR PUBLIC
+SecPlatformInitDefault PROC NEAR PUBLIC
; Inputs:
; eax -> Return address
; Outputs:
@@ -115,10 +115,10 @@
xor eax, eax
exit:
jmp ebp
-SecPlatformInitDflt ENDP
+SecPlatformInitDefault ENDP
;------------------------------------------------------------------------------
-LoadUcodeDflt PROC NEAR PUBLIC
+LoadUcodeDefault PROC NEAR PUBLIC
; Inputs:
; esp -> LOAD_UCODE_PARAMS pointer
; Register Usage:
@@ -300,7 +300,7 @@
exit:
jmp ebp
-LoadUcodeDflt ENDP
+LoadUcodeDefault ENDP
EstablishStackFsp PROC NEAR PRIVATE
;
diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
index 995aef6..973aec4 100644
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
@@ -183,7 +183,7 @@
.equ DATA_LEN_AT_STACK_TOP, (DATA_LEN_OF_PER0 + DATA_LEN_OF_MCUD + 4)
#------------------------------------------------------------------------------
-# FspSelfCheckDflt
+# FspSelfCheckDefault
# Inputs:
# eax -> Return address
# Outputs:
@@ -192,20 +192,20 @@
# eax is cleared and ebp is used for return address.
# All others reserved.
#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(FspSelfCheckDflt)
-ASM_PFX(FspSelfCheckDflt):
+ASM_GLOBAL ASM_PFX(FspSelfCheckDefault)
+ASM_PFX(FspSelfCheckDefault):
#
# Save return address to EBP
#
movl %eax, %ebp
xorl %eax, %eax
-FspSelfCheckDfltExit:
+FspSelfCheckDefaultExit:
jmp *%ebp
#------------------------------------------------------------------------------
-# SecPlatformInitDflt
+# SecPlatformInitDefault
# Inputs:
# eax -> Return address
# Outputs:
@@ -214,15 +214,15 @@
# eax is cleared and ebp is used for return address.
# All others reserved.
#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(SecPlatformInitDflt)
-ASM_PFX(SecPlatformInitDflt):
+ASM_GLOBAL ASM_PFX(SecPlatformInitDefault)
+ASM_PFX(SecPlatformInitDefault):
#
# Save return address to EBP
#
movl %eax, %ebp
xorl %eax, %eax
-SecPlatformInitDfltExit:
+SecPlatformInitDefaultExit:
jmp *%ebp
@@ -550,7 +550,7 @@
# CPUID/DeviceID check
#
movl $TempRamInitApiL0, %eax
- jmp ASM_PFX(FspSelfCheckDflt) # @note: ESP can not be changed.
+ jmp ASM_PFX(FspSelfCheckDefault) # @note: ESP can not be changed.
TempRamInitApiL0:
cmpl $0x00, %eax
jnz NemInitExit